mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-01 14:44:12 +00:00
755a9ba7bf
As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5 /jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5 rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF 3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW PUPlrVfYXzIKsh+OU1HO =OvOG -----END PGP SIGNATURE----- Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
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7.6 KiB
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410 lines
7.6 KiB
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/*
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* Device Tree Source for the Koelsch board
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2014 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a7791.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Koelsch";
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compatible = "renesas,koelsch", "renesas,r8a7791";
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aliases {
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serial6 = &scif0;
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serial7 = &scif1;
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};
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chosen {
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bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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key-1 {
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gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_1>;
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label = "SW2-1";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-2 {
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gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_2>;
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label = "SW2-2";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-3 {
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gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_3>;
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label = "SW2-3";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-4 {
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gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_4>;
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label = "SW2-4";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-a {
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gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_A>;
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label = "SW30";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-b {
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gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_B>;
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label = "SW31";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-c {
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gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_C>;
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label = "SW32";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-d {
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gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_D>;
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label = "SW33";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-e {
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gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_E>;
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label = "SW34";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-f {
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gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_F>;
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label = "SW35";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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key-g {
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gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_G>;
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label = "SW36";
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gpio-key,wakeup;
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debounce-interval = <20>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led6 {
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gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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};
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led7 {
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gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
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};
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led8 {
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gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
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};
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};
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vcc_sdhi0: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator@1 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi1: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI1 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi1: regulator@3 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI1 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi2: regulator@4 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi2: regulator@5 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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eeprom@50 {
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compatible = "renesas,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&i2c6 {
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status = "okay";
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clock-frequency = <100000>;
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};
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&pfc {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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i2c2_pins: i2c2 {
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renesas,groups = "i2c2";
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renesas,function = "i2c2";
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};
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du_pins: du {
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renesas,groups = "du_rgb666", "du_sync", "du_clk_out_0";
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renesas,function = "du";
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};
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scif0_pins: serial0 {
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renesas,groups = "scif0_data_d";
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renesas,function = "scif0";
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};
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scif1_pins: serial1 {
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renesas,groups = "scif1_data_d";
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renesas,function = "scif1";
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};
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ether_pins: ether {
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renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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renesas,function = "eth";
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};
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phy1_pins: phy1 {
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renesas,groups = "intc_irq0";
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renesas,function = "intc";
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};
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sdhi0_pins: sd0 {
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
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renesas,function = "sdhi0";
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};
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sdhi1_pins: sd1 {
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renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
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renesas,function = "sdhi1";
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};
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sdhi2_pins: sd2 {
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renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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renesas,function = "sdhi2";
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};
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qspi_pins: spi0 {
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renesas,groups = "qspi_ctrl", "qspi_data4";
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renesas,function = "qspi";
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};
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msiof0_pins: spi1 {
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renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
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"msiof0_tx";
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renesas,function = "msiof0";
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};
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};
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ðer {
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pinctrl-0 = <ðer_pins &phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "ok";
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif1 {
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pinctrl-0 = <&scif1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi1 {
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pinctrl-0 = <&sdhi1_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi1>;
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vqmmc-supply = <&vccq_sdhi1>;
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cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi2>;
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vqmmc-supply = <&vccq_sdhi2>;
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cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25fl512s";
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reg = <0>;
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spi-max-frequency = <30000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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partition@0 {
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label = "loader";
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reg = <0x00000000 0x00080000>;
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read-only;
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};
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partition@80000 {
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label = "bootenv";
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reg = <0x00080000 0x00080000>;
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read-only;
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};
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partition@100000 {
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label = "data";
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reg = <0x00100000 0x03f00000>;
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};
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};
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};
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&msiof0 {
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pinctrl-0 = <&msiof0_pins>;
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pinctrl-names = "default";
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status = "okay";
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pmic: pmic@0 {
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compatible = "renesas,r2a11302ft";
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reg = <0>;
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spi-max-frequency = <6000000>;
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spi-cpol;
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spi-cpha;
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};
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};
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