Oliver Upton ae8d3522e5 KVM: arm64: Add PMU event filter bits required if EL3 is implemented ... Suzuki noticed that KVM's PMU emulation is oblivious to the NSU and NSK event filter bits. On systems that have EL3 these bits modify the filter behavior in non-secure EL0 and EL1, respectively. Even though the kernel doesn't use these bits, it is entirely possible some other guest OS does. Additionally, it would appear that these and the M bit are required by the architecture if EL3 is implemented. Allow the EL3 event filter bits to be set if EL3 is advertised in the guest's ID register. Implement the behavior of NSU and NSK according to the pseudocode, and entirely ignore the M bit for perf event creation. Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20231019185618.3442949-3-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>		2023-10-24 19:26:14 +00:00
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arm_pmu.h	arm_pmu: acpi: Add a representative platform device for TRBE	2023-08-18 18:07:10 +01:00
arm_pmuv3.h	KVM: arm64: Add PMU event filter bits required if EL3 is implemented	2023-10-24 19:26:14 +00:00
riscv_pmu.h	riscv: Prepare for user-space perf event mmap support	2023-08-16 07:28:19 -07:00