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5de035c270
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). While at it also drop "r_irq" member from struct bcm_i2s_priv as there are no users of it. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211221170100.27423-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
89 lines
3 KiB
C
89 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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// linux/sound/soc/bcm/bcm63xx-i2s.h
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// Copyright (c) 2020 Broadcom Corporation
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// Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
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#ifndef __BCM63XX_I2S_H
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#define __BCM63XX_I2S_H
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#define I2S_DESC_FIFO_DEPTH 8
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#define I2S_MISC_CFG (0x003C)
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#define I2S_PAD_LVL_LOOP_DIS_MASK (1 << 2)
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#define I2S_PAD_LVL_LOOP_DIS_ENABLE I2S_PAD_LVL_LOOP_DIS_MASK
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#define I2S_TX_ENABLE_MASK (1 << 31)
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#define I2S_TX_ENABLE I2S_TX_ENABLE_MASK
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#define I2S_TX_OUT_R (1 << 19)
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#define I2S_TX_DATA_ALIGNMENT (1 << 2)
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#define I2S_TX_DATA_ENABLE (1 << 1)
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#define I2S_TX_CLOCK_ENABLE (1 << 0)
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#define I2S_TX_DESC_OFF_LEVEL_SHIFT 12
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#define I2S_TX_DESC_OFF_LEVEL_MASK (0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT)
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#define I2S_TX_DESC_IFF_LEVEL_SHIFT 8
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#define I2S_TX_DESC_IFF_LEVEL_MASK (0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT)
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#define I2S_TX_DESC_OFF_INTR_EN_MSK (1 << 1)
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#define I2S_TX_DESC_OFF_INTR_EN I2S_TX_DESC_OFF_INTR_EN_MSK
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#define I2S_TX_CFG (0x0000)
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#define I2S_TX_IRQ_CTL (0x0004)
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#define I2S_TX_IRQ_EN (0x0008)
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#define I2S_TX_IRQ_IFF_THLD (0x000c)
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#define I2S_TX_IRQ_OFF_THLD (0x0010)
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#define I2S_TX_DESC_IFF_ADDR (0x0014)
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#define I2S_TX_DESC_IFF_LEN (0x0018)
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#define I2S_TX_DESC_OFF_ADDR (0x001C)
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#define I2S_TX_DESC_OFF_LEN (0x0020)
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#define I2S_TX_CFG_2 (0x0024)
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#define I2S_TX_SLAVE_MODE_SHIFT 13
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#define I2S_TX_SLAVE_MODE_MASK (1 << I2S_TX_SLAVE_MODE_SHIFT)
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#define I2S_TX_SLAVE_MODE I2S_TX_SLAVE_MODE_MASK
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#define I2S_TX_MASTER_MODE 0
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#define I2S_TX_INTR_MASK 0x0F
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#define I2S_RX_ENABLE_MASK (1 << 31)
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#define I2S_RX_ENABLE I2S_RX_ENABLE_MASK
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#define I2S_RX_IN_R (1 << 19)
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#define I2S_RX_DATA_ALIGNMENT (1 << 2)
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#define I2S_RX_CLOCK_ENABLE (1 << 0)
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#define I2S_RX_DESC_OFF_LEVEL_SHIFT 12
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#define I2S_RX_DESC_OFF_LEVEL_MASK (0x0F << I2S_RX_DESC_OFF_LEVEL_SHIFT)
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#define I2S_RX_DESC_IFF_LEVEL_SHIFT 8
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#define I2S_RX_DESC_IFF_LEVEL_MASK (0x0F << I2S_RX_DESC_IFF_LEVEL_SHIFT)
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#define I2S_RX_DESC_OFF_INTR_EN_MSK (1 << 1)
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#define I2S_RX_DESC_OFF_INTR_EN I2S_RX_DESC_OFF_INTR_EN_MSK
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#define I2S_RX_CFG (0x0040) /* 20c0 */
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#define I2S_RX_IRQ_CTL (0x0044)
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#define I2S_RX_IRQ_EN (0x0048)
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#define I2S_RX_IRQ_IFF_THLD (0x004C)
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#define I2S_RX_IRQ_OFF_THLD (0x0050)
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#define I2S_RX_DESC_IFF_ADDR (0x0054)
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#define I2S_RX_DESC_IFF_LEN (0x0058)
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#define I2S_RX_DESC_OFF_ADDR (0x005C)
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#define I2S_RX_DESC_OFF_LEN (0x0060)
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#define I2S_RX_CFG_2 (0x0064)
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#define I2S_RX_SLAVE_MODE_SHIFT 13
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#define I2S_RX_SLAVE_MODE_MASK (1 << I2S_RX_SLAVE_MODE_SHIFT)
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#define I2S_RX_SLAVE_MODE I2S_RX_SLAVE_MODE_MASK
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#define I2S_RX_MASTER_MODE 0
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#define I2S_RX_INTR_MASK 0x0F
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#define I2S_REG_MAX 0x007C
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struct bcm_i2s_priv {
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struct device *dev;
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struct regmap *regmap_i2s;
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struct clk *i2s_clk;
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struct snd_pcm_substream *play_substream;
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struct snd_pcm_substream *capture_substream;
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struct i2s_dma_desc *play_dma_desc;
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struct i2s_dma_desc *capture_dma_desc;
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};
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extern int bcm63xx_soc_platform_probe(struct platform_device *pdev,
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struct bcm_i2s_priv *i2s_priv);
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extern int bcm63xx_soc_platform_remove(struct platform_device *pdev);
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#endif
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