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![Lad Prabhakar](/assets/img/avatar_default.png)
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). While at it also drop "r_irq" member from struct bcm_i2s_priv as there are no users of it. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211221170100.27423-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
414 lines
11 KiB
C
414 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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// linux/sound/bcm/bcm63xx-pcm-whistler.c
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// BCM63xx whistler pcm interface
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// Copyright (c) 2020 Broadcom Corporation
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// Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <sound/pcm_params.h>
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#include <linux/regmap.h>
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#include <linux/of_device.h>
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#include <sound/soc.h>
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#include "bcm63xx-i2s.h"
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struct i2s_dma_desc {
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unsigned char *dma_area;
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dma_addr_t dma_addr;
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unsigned int dma_len;
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};
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struct bcm63xx_runtime_data {
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int dma_len;
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dma_addr_t dma_addr;
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dma_addr_t dma_addr_next;
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};
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static const struct snd_pcm_hardware bcm63xx_pcm_hardware = {
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.info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S32_LE, /* support S32 only */
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.period_bytes_max = 8192 - 32,
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.periods_min = 1,
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.periods_max = PAGE_SIZE/sizeof(struct i2s_dma_desc),
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.buffer_bytes_max = 128 * 1024,
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.fifo_size = 32,
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};
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static int bcm63xx_pcm_hw_params(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct i2s_dma_desc *dma_desc;
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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dma_desc = kzalloc(sizeof(*dma_desc), GFP_NOWAIT);
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if (!dma_desc)
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return -ENOMEM;
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snd_soc_dai_set_dma_data(asoc_rtd_to_cpu(rtd, 0), substream, dma_desc);
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return 0;
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}
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static int bcm63xx_pcm_hw_free(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct i2s_dma_desc *dma_desc;
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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kfree(dma_desc);
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return 0;
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}
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static int bcm63xx_pcm_trigger(struct snd_soc_component *component,
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struct snd_pcm_substream *substream, int cmd)
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{
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int ret = 0;
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struct snd_soc_pcm_runtime *rtd;
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struct bcm_i2s_priv *i2s_priv;
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struct regmap *regmap_i2s;
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rtd = asoc_substream_to_rtd(substream);
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i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
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regmap_i2s = i2s_priv->regmap_i2s;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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regmap_update_bits(regmap_i2s,
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I2S_TX_IRQ_EN,
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I2S_TX_DESC_OFF_INTR_EN,
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I2S_TX_DESC_OFF_INTR_EN);
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regmap_update_bits(regmap_i2s,
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I2S_TX_CFG,
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I2S_TX_ENABLE_MASK,
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I2S_TX_ENABLE);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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regmap_write(regmap_i2s,
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I2S_TX_IRQ_EN,
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0);
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regmap_update_bits(regmap_i2s,
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I2S_TX_CFG,
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I2S_TX_ENABLE_MASK,
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0);
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break;
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default:
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ret = -EINVAL;
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}
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} else {
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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regmap_update_bits(regmap_i2s,
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I2S_RX_IRQ_EN,
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I2S_RX_DESC_OFF_INTR_EN_MSK,
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I2S_RX_DESC_OFF_INTR_EN);
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regmap_update_bits(regmap_i2s,
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I2S_RX_CFG,
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I2S_RX_ENABLE_MASK,
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I2S_RX_ENABLE);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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regmap_update_bits(regmap_i2s,
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I2S_RX_IRQ_EN,
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I2S_RX_DESC_OFF_INTR_EN_MSK,
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0);
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regmap_update_bits(regmap_i2s,
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I2S_RX_CFG,
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I2S_RX_ENABLE_MASK,
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0);
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break;
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default:
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ret = -EINVAL;
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}
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}
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return ret;
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}
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static int bcm63xx_pcm_prepare(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct i2s_dma_desc *dma_desc;
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struct regmap *regmap_i2s;
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struct bcm_i2s_priv *i2s_priv;
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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uint32_t regaddr_desclen, regaddr_descaddr;
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dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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dma_desc->dma_len = snd_pcm_lib_period_bytes(substream);
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dma_desc->dma_addr = runtime->dma_addr;
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dma_desc->dma_area = runtime->dma_area;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regaddr_desclen = I2S_TX_DESC_IFF_LEN;
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regaddr_descaddr = I2S_TX_DESC_IFF_ADDR;
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} else {
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regaddr_desclen = I2S_RX_DESC_IFF_LEN;
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regaddr_descaddr = I2S_RX_DESC_IFF_ADDR;
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}
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i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
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regmap_i2s = i2s_priv->regmap_i2s;
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regmap_write(regmap_i2s, regaddr_desclen, dma_desc->dma_len);
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regmap_write(regmap_i2s, regaddr_descaddr, dma_desc->dma_addr);
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return 0;
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}
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static snd_pcm_uframes_t
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bcm63xx_pcm_pointer(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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snd_pcm_uframes_t x;
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struct bcm63xx_runtime_data *prtd = substream->runtime->private_data;
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if (!prtd->dma_addr_next)
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prtd->dma_addr_next = substream->runtime->dma_addr;
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x = bytes_to_frames(substream->runtime,
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prtd->dma_addr_next - substream->runtime->dma_addr);
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return x == substream->runtime->buffer_size ? 0 : x;
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}
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static int bcm63xx_pcm_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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int ret = 0;
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct bcm63xx_runtime_data *prtd;
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runtime->hw = bcm63xx_pcm_hardware;
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ret = snd_pcm_hw_constraint_step(runtime, 0,
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SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
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if (ret)
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goto out;
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ret = snd_pcm_hw_constraint_step(runtime, 0,
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SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
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if (ret)
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goto out;
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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goto out;
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ret = -ENOMEM;
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prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
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if (!prtd)
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goto out;
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runtime->private_data = prtd;
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return 0;
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out:
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return ret;
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}
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static int bcm63xx_pcm_close(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct bcm63xx_runtime_data *prtd = runtime->private_data;
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kfree(prtd);
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return 0;
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}
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static irqreturn_t i2s_dma_isr(int irq, void *bcm_i2s_priv)
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{
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unsigned int availdepth, ifflevel, offlevel, int_status, val_1, val_2;
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struct bcm63xx_runtime_data *prtd;
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struct snd_pcm_substream *substream;
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struct snd_pcm_runtime *runtime;
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struct regmap *regmap_i2s;
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struct i2s_dma_desc *dma_desc;
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struct snd_soc_pcm_runtime *rtd;
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struct bcm_i2s_priv *i2s_priv;
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i2s_priv = (struct bcm_i2s_priv *)bcm_i2s_priv;
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regmap_i2s = i2s_priv->regmap_i2s;
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/* rx */
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regmap_read(regmap_i2s, I2S_RX_IRQ_CTL, &int_status);
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if (int_status & I2S_RX_DESC_OFF_INTR_EN_MSK) {
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substream = i2s_priv->capture_substream;
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runtime = substream->runtime;
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rtd = asoc_substream_to_rtd(substream);
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prtd = runtime->private_data;
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dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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offlevel = (int_status & I2S_RX_DESC_OFF_LEVEL_MASK) >>
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I2S_RX_DESC_OFF_LEVEL_SHIFT;
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while (offlevel) {
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regmap_read(regmap_i2s, I2S_RX_DESC_OFF_ADDR, &val_1);
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regmap_read(regmap_i2s, I2S_RX_DESC_OFF_LEN, &val_2);
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offlevel--;
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}
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prtd->dma_addr_next = val_1 + val_2;
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ifflevel = (int_status & I2S_RX_DESC_IFF_LEVEL_MASK) >>
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I2S_RX_DESC_IFF_LEVEL_SHIFT;
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availdepth = I2S_DESC_FIFO_DEPTH - ifflevel;
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while (availdepth) {
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dma_desc->dma_addr +=
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snd_pcm_lib_period_bytes(substream);
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dma_desc->dma_area +=
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snd_pcm_lib_period_bytes(substream);
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if (dma_desc->dma_addr - runtime->dma_addr >=
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runtime->dma_bytes) {
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dma_desc->dma_addr = runtime->dma_addr;
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dma_desc->dma_area = runtime->dma_area;
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}
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prtd->dma_addr = dma_desc->dma_addr;
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regmap_write(regmap_i2s, I2S_RX_DESC_IFF_LEN,
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snd_pcm_lib_period_bytes(substream));
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regmap_write(regmap_i2s, I2S_RX_DESC_IFF_ADDR,
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dma_desc->dma_addr);
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availdepth--;
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}
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snd_pcm_period_elapsed(substream);
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/* Clear interrupt by writing 0 */
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regmap_update_bits(regmap_i2s, I2S_RX_IRQ_CTL,
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I2S_RX_INTR_MASK, 0);
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}
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/* tx */
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regmap_read(regmap_i2s, I2S_TX_IRQ_CTL, &int_status);
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if (int_status & I2S_TX_DESC_OFF_INTR_EN_MSK) {
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substream = i2s_priv->play_substream;
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runtime = substream->runtime;
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rtd = asoc_substream_to_rtd(substream);
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prtd = runtime->private_data;
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dma_desc = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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offlevel = (int_status & I2S_TX_DESC_OFF_LEVEL_MASK) >>
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I2S_TX_DESC_OFF_LEVEL_SHIFT;
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while (offlevel) {
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regmap_read(regmap_i2s, I2S_TX_DESC_OFF_ADDR, &val_1);
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regmap_read(regmap_i2s, I2S_TX_DESC_OFF_LEN, &val_2);
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prtd->dma_addr_next = val_1 + val_2;
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offlevel--;
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}
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ifflevel = (int_status & I2S_TX_DESC_IFF_LEVEL_MASK) >>
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I2S_TX_DESC_IFF_LEVEL_SHIFT;
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availdepth = I2S_DESC_FIFO_DEPTH - ifflevel;
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while (availdepth) {
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dma_desc->dma_addr +=
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snd_pcm_lib_period_bytes(substream);
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dma_desc->dma_area +=
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snd_pcm_lib_period_bytes(substream);
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if (dma_desc->dma_addr - runtime->dma_addr >=
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runtime->dma_bytes) {
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dma_desc->dma_addr = runtime->dma_addr;
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dma_desc->dma_area = runtime->dma_area;
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}
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prtd->dma_addr = dma_desc->dma_addr;
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regmap_write(regmap_i2s, I2S_TX_DESC_IFF_LEN,
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snd_pcm_lib_period_bytes(substream));
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regmap_write(regmap_i2s, I2S_TX_DESC_IFF_ADDR,
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dma_desc->dma_addr);
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availdepth--;
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}
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snd_pcm_period_elapsed(substream);
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/* Clear interrupt by writing 0 */
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regmap_update_bits(regmap_i2s, I2S_TX_IRQ_CTL,
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I2S_TX_INTR_MASK, 0);
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}
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return IRQ_HANDLED;
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}
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static int bcm63xx_soc_pcm_new(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_pcm *pcm = rtd->pcm;
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struct bcm_i2s_priv *i2s_priv;
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int ret;
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i2s_priv = dev_get_drvdata(asoc_rtd_to_cpu(rtd, 0)->dev);
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of_dma_configure(pcm->card->dev, pcm->card->dev->of_node, 1);
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ret = dma_coerce_mask_and_coherent(pcm->card->dev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
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i2s_priv->play_substream =
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pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
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if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream)
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i2s_priv->capture_substream =
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pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
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return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_WC,
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pcm->card->dev,
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bcm63xx_pcm_hardware.buffer_bytes_max);
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}
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static const struct snd_soc_component_driver bcm63xx_soc_platform = {
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.open = bcm63xx_pcm_open,
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.close = bcm63xx_pcm_close,
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.hw_params = bcm63xx_pcm_hw_params,
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.hw_free = bcm63xx_pcm_hw_free,
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.prepare = bcm63xx_pcm_prepare,
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.trigger = bcm63xx_pcm_trigger,
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.pointer = bcm63xx_pcm_pointer,
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.pcm_construct = bcm63xx_soc_pcm_new,
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};
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int bcm63xx_soc_platform_probe(struct platform_device *pdev,
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struct bcm_i2s_priv *i2s_priv)
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{
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int ret;
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ret = platform_get_irq(pdev, 0);
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if (ret < 0)
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return ret;
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ret = devm_request_irq(&pdev->dev, ret, i2s_dma_isr,
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irq_get_trigger_type(ret), "i2s_dma", (void *)i2s_priv);
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if (ret) {
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dev_err(&pdev->dev,
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"i2s_init: failed to request interrupt.ret=%d\n", ret);
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return ret;
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}
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return devm_snd_soc_register_component(&pdev->dev,
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&bcm63xx_soc_platform, NULL, 0);
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}
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int bcm63xx_soc_platform_remove(struct platform_device *pdev)
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{
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return 0;
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}
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MODULE_AUTHOR("Kevin,Li <kevin-ke.li@broadcom.com>");
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MODULE_DESCRIPTION("Broadcom DSL XPON ASOC PCM Interface");
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MODULE_LICENSE("GPL v2");
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