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Audio tuner is used to handle clock drift between 26M and APLL domain. It's expected when abs(chg_cnt) equals to upper bound, tuner updates pcw setting automatically, and then abs(chg_cnt) decreases. In the stress test, we found abs(chg_cnt) possibly equals to 2 at the unexpected timing. This results in wrong pcw updating. Finally, abs(chg_cnt) will always be larger than upper bound, As a result, we update the upper bound to 3 to handle the corner case. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220927151141.11846-1-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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| .. | ||
| Makefile | ||
| mt8195-afe-clk.c | ||
| mt8195-afe-clk.h | ||
| mt8195-afe-common.h | ||
| mt8195-afe-pcm.c | ||
| mt8195-audsys-clk.c | ||
| mt8195-audsys-clk.h | ||
| mt8195-audsys-clkid.h | ||
| mt8195-dai-adda.c | ||
| mt8195-dai-etdm.c | ||
| mt8195-dai-pcm.c | ||
| mt8195-mt6359.c | ||
| mt8195-reg.h | ||