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![Martin Blumenstingl](/assets/img/avatar_default.png)
The FIFO registers which take an DMA-able address are only 32-bit wide
on AIU. Add dma_coerce_mask_and_coherent() to make the DMA core aware of
this limitation.
Fixes: 6ae9ca9ce9
("ASoC: meson: aiu: add i2s and spdif support")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20211206210804.2512999-2-martin.blumenstingl@googlemail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
214 lines
5.4 KiB
C
214 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2020 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include "aiu-fifo.h"
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#define AIU_MEM_START 0x00
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#define AIU_MEM_RD 0x04
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#define AIU_MEM_END 0x08
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#define AIU_MEM_MASKS 0x0c
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#define AIU_MEM_MASK_CH_RD GENMASK(7, 0)
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#define AIU_MEM_MASK_CH_MEM GENMASK(15, 8)
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#define AIU_MEM_CONTROL 0x10
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#define AIU_MEM_CONTROL_INIT BIT(0)
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#define AIU_MEM_CONTROL_FILL_EN BIT(1)
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#define AIU_MEM_CONTROL_EMPTY_EN BIT(2)
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static struct snd_soc_dai *aiu_fifo_dai(struct snd_pcm_substream *ss)
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{
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struct snd_soc_pcm_runtime *rtd = ss->private_data;
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return asoc_rtd_to_cpu(rtd, 0);
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}
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snd_pcm_uframes_t aiu_fifo_pointer(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_dai *dai = aiu_fifo_dai(substream);
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struct aiu_fifo *fifo = dai->playback_dma_data;
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned int addr;
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addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD);
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return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr);
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}
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static void aiu_fifo_enable(struct snd_soc_dai *dai, bool enable)
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{
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struct snd_soc_component *component = dai->component;
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struct aiu_fifo *fifo = dai->playback_dma_data;
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unsigned int en_mask = (AIU_MEM_CONTROL_FILL_EN |
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AIU_MEM_CONTROL_EMPTY_EN);
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snd_soc_component_update_bits(component,
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fifo->mem_offset + AIU_MEM_CONTROL,
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en_mask, enable ? en_mask : 0);
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}
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int aiu_fifo_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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aiu_fifo_enable(dai, true);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_STOP:
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aiu_fifo_enable(dai, false);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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int aiu_fifo_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct aiu_fifo *fifo = dai->playback_dma_data;
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snd_soc_component_update_bits(component,
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fifo->mem_offset + AIU_MEM_CONTROL,
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AIU_MEM_CONTROL_INIT,
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AIU_MEM_CONTROL_INIT);
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snd_soc_component_update_bits(component,
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fifo->mem_offset + AIU_MEM_CONTROL,
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AIU_MEM_CONTROL_INIT, 0);
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return 0;
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}
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int aiu_fifo_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_soc_component *component = dai->component;
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struct aiu_fifo *fifo = dai->playback_dma_data;
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dma_addr_t end;
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/* Setup the fifo boundaries */
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end = runtime->dma_addr + runtime->dma_bytes - fifo->fifo_block;
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snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_START,
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runtime->dma_addr);
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snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_RD,
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runtime->dma_addr);
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snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_END,
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end);
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/* Setup the fifo to read all the memory - no skip */
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snd_soc_component_update_bits(component,
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fifo->mem_offset + AIU_MEM_MASKS,
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AIU_MEM_MASK_CH_RD | AIU_MEM_MASK_CH_MEM,
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FIELD_PREP(AIU_MEM_MASK_CH_RD, 0xff) |
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FIELD_PREP(AIU_MEM_MASK_CH_MEM, 0xff));
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return 0;
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}
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static irqreturn_t aiu_fifo_isr(int irq, void *dev_id)
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{
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struct snd_pcm_substream *playback = dev_id;
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snd_pcm_period_elapsed(playback);
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return IRQ_HANDLED;
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}
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int aiu_fifo_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct aiu_fifo *fifo = dai->playback_dma_data;
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int ret;
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snd_soc_set_runtime_hwparams(substream, fifo->pcm);
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/*
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* Make sure the buffer and period size are multiple of the fifo burst
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* size
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*/
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ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
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fifo->fifo_block);
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if (ret)
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return ret;
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ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
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fifo->fifo_block);
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if (ret)
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return ret;
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ret = clk_prepare_enable(fifo->pclk);
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if (ret)
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return ret;
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ret = request_irq(fifo->irq, aiu_fifo_isr, 0, dev_name(dai->dev),
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substream);
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if (ret)
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clk_disable_unprepare(fifo->pclk);
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return ret;
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}
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void aiu_fifo_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct aiu_fifo *fifo = dai->playback_dma_data;
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free_irq(fifo->irq, substream);
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clk_disable_unprepare(fifo->pclk);
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}
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int aiu_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd,
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struct snd_soc_dai *dai)
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{
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struct snd_card *card = rtd->card->snd_card;
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struct aiu_fifo *fifo = dai->playback_dma_data;
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size_t size = fifo->pcm->buffer_bytes_max;
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int ret;
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ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
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card->dev, size, size);
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return 0;
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}
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int aiu_fifo_dai_probe(struct snd_soc_dai *dai)
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{
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struct aiu_fifo *fifo;
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fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
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if (!fifo)
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return -ENOMEM;
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dai->playback_dma_data = fifo;
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return 0;
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}
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int aiu_fifo_dai_remove(struct snd_soc_dai *dai)
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{
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kfree(dai->playback_dma_data);
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return 0;
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}
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