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![Sameer Pujar](/assets/img/avatar_default.png)
The kcontrol put callback is expected to return 1 when there is change
in HW or when the update is acknowledged by driver. This would ensure
that change notifications are sent to subscribed applications. Update
the DMIC driver accordingly.
Fixes: 8c8ff982e9
("ASoC: tegra: Add Tegra210 based DMIC driver")
Suggested-by: Jaroslav Kysela <perex@perex.cz>
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/r/1637219231-406-10-git-send-email-spujar@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
570 lines
16 KiB
C
570 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// tegra210_dmic.c - Tegra210 DMIC driver
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//
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// Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "tegra210_dmic.h"
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#include "tegra_cif.h"
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static const struct reg_default tegra210_dmic_reg_defaults[] = {
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{ TEGRA210_DMIC_TX_INT_MASK, 0x00000001 },
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{ TEGRA210_DMIC_TX_CIF_CTRL, 0x00007700 },
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{ TEGRA210_DMIC_CG, 0x1 },
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{ TEGRA210_DMIC_CTRL, 0x00000301 },
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/* Below enables all filters - DCR, LP and SC */
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{ TEGRA210_DMIC_DBG_CTRL, 0xe },
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/* Below as per latest POR value */
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{ TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, 0x0 },
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/* LP filter is configured for pass through and used to apply gain */
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{ TEGRA210_DMIC_LP_BIQUAD_0_COEF_0, 0x00800000 },
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{ TEGRA210_DMIC_LP_BIQUAD_0_COEF_1, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_0_COEF_2, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_0_COEF_3, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_0_COEF_4, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_1_COEF_0, 0x00800000 },
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{ TEGRA210_DMIC_LP_BIQUAD_1_COEF_1, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_1_COEF_2, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_1_COEF_3, 0x0 },
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{ TEGRA210_DMIC_LP_BIQUAD_1_COEF_4, 0x0 },
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};
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static int __maybe_unused tegra210_dmic_runtime_suspend(struct device *dev)
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{
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struct tegra210_dmic *dmic = dev_get_drvdata(dev);
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regcache_cache_only(dmic->regmap, true);
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regcache_mark_dirty(dmic->regmap);
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clk_disable_unprepare(dmic->clk_dmic);
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return 0;
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}
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static int __maybe_unused tegra210_dmic_runtime_resume(struct device *dev)
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{
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struct tegra210_dmic *dmic = dev_get_drvdata(dev);
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int err;
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err = clk_prepare_enable(dmic->clk_dmic);
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if (err) {
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dev_err(dev, "failed to enable DMIC clock, err: %d\n", err);
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return err;
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}
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regcache_cache_only(dmic->regmap, false);
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regcache_sync(dmic->regmap);
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return 0;
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}
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static int tegra210_dmic_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct tegra210_dmic *dmic = snd_soc_dai_get_drvdata(dai);
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unsigned int srate, clk_rate, channels;
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struct tegra_cif_conf cif_conf;
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unsigned long long gain_q23 = DEFAULT_GAIN_Q23;
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int err;
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memset(&cif_conf, 0, sizeof(struct tegra_cif_conf));
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channels = params_channels(params);
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cif_conf.audio_ch = channels;
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switch (dmic->ch_select) {
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case DMIC_CH_SELECT_LEFT:
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case DMIC_CH_SELECT_RIGHT:
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cif_conf.client_ch = 1;
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break;
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case DMIC_CH_SELECT_STEREO:
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cif_conf.client_ch = 2;
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break;
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default:
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dev_err(dai->dev, "invalid DMIC client channels\n");
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return -EINVAL;
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}
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srate = params_rate(params);
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/*
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* DMIC clock rate is a multiple of 'Over Sampling Ratio' and
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* 'Sample Rate'. The supported OSR values are 64, 128 and 256.
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*/
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clk_rate = (DMIC_OSR_FACTOR << dmic->osr_val) * srate;
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err = clk_set_rate(dmic->clk_dmic, clk_rate);
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if (err) {
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dev_err(dai->dev, "can't set DMIC clock rate %u, err: %d\n",
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clk_rate, err);
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return err;
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}
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regmap_update_bits(dmic->regmap,
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/* Reg */
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TEGRA210_DMIC_CTRL,
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/* Mask */
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TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK |
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TEGRA210_DMIC_CTRL_OSR_MASK |
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TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK,
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/* Value */
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(dmic->lrsel << LRSEL_POL_SHIFT) |
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(dmic->osr_val << OSR_SHIFT) |
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((dmic->ch_select + 1) << CH_SEL_SHIFT));
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/*
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* Use LP filter gain register to apply boost.
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* Boost Gain Volume control has 100x factor.
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*/
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if (dmic->boost_gain)
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gain_q23 = div_u64(gain_q23 * dmic->boost_gain, 100);
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regmap_write(dmic->regmap, TEGRA210_DMIC_LP_FILTER_GAIN,
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(unsigned int)gain_q23);
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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cif_conf.audio_bits = TEGRA_ACIF_BITS_16;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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cif_conf.audio_bits = TEGRA_ACIF_BITS_32;
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break;
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default:
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dev_err(dai->dev, "unsupported format!\n");
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return -EOPNOTSUPP;
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}
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cif_conf.client_bits = TEGRA_ACIF_BITS_24;
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cif_conf.mono_conv = dmic->mono_to_stereo;
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cif_conf.stereo_conv = dmic->stereo_to_mono;
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tegra_set_cif(dmic->regmap, TEGRA210_DMIC_TX_CIF_CTRL, &cif_conf);
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return 0;
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}
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static int tegra210_dmic_get_boost_gain(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.integer.value[0] = dmic->boost_gain;
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return 0;
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}
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static int tegra210_dmic_put_boost_gain(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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int value = ucontrol->value.integer.value[0];
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if (value == dmic->boost_gain)
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return 0;
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dmic->boost_gain = value;
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return 1;
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}
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static int tegra210_dmic_get_ch_select(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.enumerated.item[0] = dmic->ch_select;
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return 0;
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}
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static int tegra210_dmic_put_ch_select(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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unsigned int value = ucontrol->value.enumerated.item[0];
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if (value == dmic->ch_select)
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return 0;
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dmic->ch_select = value;
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return 1;
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}
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static int tegra210_dmic_get_mono_to_stereo(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.enumerated.item[0] = dmic->mono_to_stereo;
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return 0;
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}
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static int tegra210_dmic_put_mono_to_stereo(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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unsigned int value = ucontrol->value.enumerated.item[0];
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if (value == dmic->mono_to_stereo)
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return 0;
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dmic->mono_to_stereo = value;
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return 1;
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}
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static int tegra210_dmic_get_stereo_to_mono(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.enumerated.item[0] = dmic->stereo_to_mono;
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return 0;
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}
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static int tegra210_dmic_put_stereo_to_mono(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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unsigned int value = ucontrol->value.enumerated.item[0];
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if (value == dmic->stereo_to_mono)
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return 0;
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dmic->stereo_to_mono = value;
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return 1;
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}
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static int tegra210_dmic_get_osr_val(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.enumerated.item[0] = dmic->osr_val;
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return 0;
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}
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static int tegra210_dmic_put_osr_val(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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unsigned int value = ucontrol->value.enumerated.item[0];
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if (value == dmic->osr_val)
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return 0;
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dmic->osr_val = value;
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return 1;
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}
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static int tegra210_dmic_get_pol_sel(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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ucontrol->value.enumerated.item[0] = dmic->lrsel;
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return 0;
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}
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static int tegra210_dmic_put_pol_sel(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
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struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
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unsigned int value = ucontrol->value.enumerated.item[0];
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if (value == dmic->lrsel)
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return 0;
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dmic->lrsel = value;
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return 1;
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}
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static const struct snd_soc_dai_ops tegra210_dmic_dai_ops = {
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.hw_params = tegra210_dmic_hw_params,
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};
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static struct snd_soc_dai_driver tegra210_dmic_dais[] = {
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{
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.name = "DMIC-CIF",
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.capture = {
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.stream_name = "CIF-Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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},
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},
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{
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.name = "DMIC-DAP",
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.capture = {
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.stream_name = "DAP-Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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},
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.ops = &tegra210_dmic_dai_ops,
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.symmetric_rate = 1,
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},
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};
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static const struct snd_soc_dapm_widget tegra210_dmic_widgets[] = {
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SND_SOC_DAPM_AIF_OUT("TX", NULL, 0, TEGRA210_DMIC_ENABLE, 0, 0),
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SND_SOC_DAPM_MIC("MIC", NULL),
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};
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static const struct snd_soc_dapm_route tegra210_dmic_routes[] = {
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{ "XBAR-RX", NULL, "XBAR-Capture" },
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{ "XBAR-Capture", NULL, "CIF-Capture" },
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{ "CIF-Capture", NULL, "TX" },
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{ "TX", NULL, "DAP-Capture" },
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{ "DAP-Capture", NULL, "MIC" },
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};
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static const char * const tegra210_dmic_ch_select[] = {
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"Left", "Right", "Stereo",
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};
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static const struct soc_enum tegra210_dmic_ch_enum =
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SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_ch_select),
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tegra210_dmic_ch_select);
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static const char * const tegra210_dmic_mono_conv_text[] = {
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"Zero", "Copy",
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};
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static const char * const tegra210_dmic_stereo_conv_text[] = {
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"CH0", "CH1", "AVG",
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};
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static const struct soc_enum tegra210_dmic_mono_conv_enum =
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SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_mono_conv_text),
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tegra210_dmic_mono_conv_text);
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static const struct soc_enum tegra210_dmic_stereo_conv_enum =
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SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_stereo_conv_text),
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tegra210_dmic_stereo_conv_text);
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static const char * const tegra210_dmic_osr_text[] = {
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"OSR_64", "OSR_128", "OSR_256",
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};
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static const struct soc_enum tegra210_dmic_osr_enum =
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SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_osr_text),
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tegra210_dmic_osr_text);
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static const char * const tegra210_dmic_lrsel_text[] = {
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"Left", "Right",
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};
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static const struct soc_enum tegra210_dmic_lrsel_enum =
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SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_lrsel_text),
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tegra210_dmic_lrsel_text);
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static const struct snd_kcontrol_new tegra210_dmic_controls[] = {
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SOC_SINGLE_EXT("Boost Gain Volume", 0, 0, MAX_BOOST_GAIN, 0,
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tegra210_dmic_get_boost_gain,
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tegra210_dmic_put_boost_gain),
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SOC_ENUM_EXT("Channel Select", tegra210_dmic_ch_enum,
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tegra210_dmic_get_ch_select, tegra210_dmic_put_ch_select),
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SOC_ENUM_EXT("Mono To Stereo",
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tegra210_dmic_mono_conv_enum,
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tegra210_dmic_get_mono_to_stereo,
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tegra210_dmic_put_mono_to_stereo),
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SOC_ENUM_EXT("Stereo To Mono",
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tegra210_dmic_stereo_conv_enum,
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tegra210_dmic_get_stereo_to_mono,
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tegra210_dmic_put_stereo_to_mono),
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SOC_ENUM_EXT("OSR Value", tegra210_dmic_osr_enum,
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tegra210_dmic_get_osr_val, tegra210_dmic_put_osr_val),
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SOC_ENUM_EXT("LR Polarity Select", tegra210_dmic_lrsel_enum,
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tegra210_dmic_get_pol_sel, tegra210_dmic_put_pol_sel),
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};
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static const struct snd_soc_component_driver tegra210_dmic_compnt = {
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.dapm_widgets = tegra210_dmic_widgets,
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.num_dapm_widgets = ARRAY_SIZE(tegra210_dmic_widgets),
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.dapm_routes = tegra210_dmic_routes,
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.num_dapm_routes = ARRAY_SIZE(tegra210_dmic_routes),
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.controls = tegra210_dmic_controls,
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.num_controls = ARRAY_SIZE(tegra210_dmic_controls),
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};
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static bool tegra210_dmic_wr_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TEGRA210_DMIC_TX_INT_MASK ... TEGRA210_DMIC_TX_CIF_CTRL:
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case TEGRA210_DMIC_ENABLE ... TEGRA210_DMIC_CG:
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case TEGRA210_DMIC_CTRL:
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case TEGRA210_DMIC_DBG_CTRL:
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case TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 ... TEGRA210_DMIC_LP_BIQUAD_1_COEF_4:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static bool tegra210_dmic_rd_reg(struct device *dev, unsigned int reg)
|
|
{
|
|
if (tegra210_dmic_wr_reg(dev, reg))
|
|
return true;
|
|
|
|
switch (reg) {
|
|
case TEGRA210_DMIC_TX_STATUS:
|
|
case TEGRA210_DMIC_TX_INT_STATUS:
|
|
case TEGRA210_DMIC_STATUS:
|
|
case TEGRA210_DMIC_INT_STATUS:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static bool tegra210_dmic_volatile_reg(struct device *dev, unsigned int reg)
|
|
{
|
|
switch (reg) {
|
|
case TEGRA210_DMIC_TX_STATUS:
|
|
case TEGRA210_DMIC_TX_INT_STATUS:
|
|
case TEGRA210_DMIC_TX_INT_SET:
|
|
case TEGRA210_DMIC_SOFT_RESET:
|
|
case TEGRA210_DMIC_STATUS:
|
|
case TEGRA210_DMIC_INT_STATUS:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static const struct regmap_config tegra210_dmic_regmap_config = {
|
|
.reg_bits = 32,
|
|
.reg_stride = 4,
|
|
.val_bits = 32,
|
|
.max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
|
|
.writeable_reg = tegra210_dmic_wr_reg,
|
|
.readable_reg = tegra210_dmic_rd_reg,
|
|
.volatile_reg = tegra210_dmic_volatile_reg,
|
|
.reg_defaults = tegra210_dmic_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
|
|
.cache_type = REGCACHE_FLAT,
|
|
};
|
|
|
|
static int tegra210_dmic_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct tegra210_dmic *dmic;
|
|
void __iomem *regs;
|
|
int err;
|
|
|
|
dmic = devm_kzalloc(dev, sizeof(*dmic), GFP_KERNEL);
|
|
if (!dmic)
|
|
return -ENOMEM;
|
|
|
|
dmic->osr_val = DMIC_OSR_64;
|
|
dmic->ch_select = DMIC_CH_SELECT_STEREO;
|
|
dmic->lrsel = DMIC_LRSEL_LEFT;
|
|
dmic->boost_gain = 0;
|
|
dmic->stereo_to_mono = 0; /* "CH0" */
|
|
|
|
dev_set_drvdata(dev, dmic);
|
|
|
|
dmic->clk_dmic = devm_clk_get(dev, "dmic");
|
|
if (IS_ERR(dmic->clk_dmic)) {
|
|
dev_err(dev, "can't retrieve DMIC clock\n");
|
|
return PTR_ERR(dmic->clk_dmic);
|
|
}
|
|
|
|
regs = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(regs))
|
|
return PTR_ERR(regs);
|
|
|
|
dmic->regmap = devm_regmap_init_mmio(dev, regs,
|
|
&tegra210_dmic_regmap_config);
|
|
if (IS_ERR(dmic->regmap)) {
|
|
dev_err(dev, "regmap init failed\n");
|
|
return PTR_ERR(dmic->regmap);
|
|
}
|
|
|
|
regcache_cache_only(dmic->regmap, true);
|
|
|
|
err = devm_snd_soc_register_component(dev, &tegra210_dmic_compnt,
|
|
tegra210_dmic_dais,
|
|
ARRAY_SIZE(tegra210_dmic_dais));
|
|
if (err) {
|
|
dev_err(dev, "can't register DMIC component, err: %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
pm_runtime_enable(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra210_dmic_remove(struct platform_device *pdev)
|
|
{
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops tegra210_dmic_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(tegra210_dmic_runtime_suspend,
|
|
tegra210_dmic_runtime_resume, NULL)
|
|
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
};
|
|
|
|
static const struct of_device_id tegra210_dmic_of_match[] = {
|
|
{ .compatible = "nvidia,tegra210-dmic" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, tegra210_dmic_of_match);
|
|
|
|
static struct platform_driver tegra210_dmic_driver = {
|
|
.driver = {
|
|
.name = "tegra210-dmic",
|
|
.of_match_table = tegra210_dmic_of_match,
|
|
.pm = &tegra210_dmic_pm_ops,
|
|
},
|
|
.probe = tegra210_dmic_probe,
|
|
.remove = tegra210_dmic_remove,
|
|
};
|
|
module_platform_driver(tegra210_dmic_driver)
|
|
|
|
MODULE_AUTHOR("Rahul Mittal <rmittal@nvidia.com>");
|
|
MODULE_DESCRIPTION("Tegra210 ASoC DMIC driver");
|
|
MODULE_LICENSE("GPL v2");
|