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![Hans-Christian Egtvedt](/assets/img/avatar_default.png)
This patch increases periods_min to 6 from 4, this will remove any hickups where the buffer is not filled fast enough from user space. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
602 lines
15 KiB
C
602 lines
15 KiB
C
/*
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* Driver for the Atmel on-chip Audio Bitstream DAC (ABDAC)
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*
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* Copyright (C) 2006-2009 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/bitmap.h>
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#include <linux/dw_dmac.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/atmel-abdac.h>
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/* DAC register offsets */
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#define DAC_DATA 0x0000
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#define DAC_CTRL 0x0008
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#define DAC_INT_MASK 0x000c
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#define DAC_INT_EN 0x0010
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#define DAC_INT_DIS 0x0014
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#define DAC_INT_CLR 0x0018
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#define DAC_INT_STATUS 0x001c
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/* Bitfields in CTRL */
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#define DAC_SWAP_OFFSET 30
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#define DAC_SWAP_SIZE 1
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#define DAC_EN_OFFSET 31
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#define DAC_EN_SIZE 1
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/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
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#define DAC_UNDERRUN_OFFSET 28
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#define DAC_UNDERRUN_SIZE 1
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#define DAC_TX_READY_OFFSET 29
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#define DAC_TX_READY_SIZE 1
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/* Bit manipulation macros */
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#define DAC_BIT(name) \
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(1 << DAC_##name##_OFFSET)
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#define DAC_BF(name, value) \
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(((value) & ((1 << DAC_##name##_SIZE) - 1)) \
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<< DAC_##name##_OFFSET)
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#define DAC_BFEXT(name, value) \
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(((value) >> DAC_##name##_OFFSET) \
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& ((1 << DAC_##name##_SIZE) - 1))
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#define DAC_BFINS(name, value, old) \
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(((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
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<< DAC_##name##_OFFSET)) \
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| DAC_BF(name, value))
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/* Register access macros */
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#define dac_readl(port, reg) \
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__raw_readl((port)->regs + DAC_##reg)
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#define dac_writel(port, reg, value) \
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__raw_writel((value), (port)->regs + DAC_##reg)
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/*
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* ABDAC supports a maximum of 6 different rates from a generic clock. The
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* generic clock has a power of two divider, which gives 6 steps from 192 kHz
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* to 5112 Hz.
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*/
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#define MAX_NUM_RATES 6
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/* ALSA seems to use rates between 192000 Hz and 5112 Hz. */
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#define RATE_MAX 192000
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#define RATE_MIN 5112
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enum {
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DMA_READY = 0,
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};
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struct atmel_abdac_dma {
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struct dma_chan *chan;
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struct dw_cyclic_desc *cdesc;
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};
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struct atmel_abdac {
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struct clk *pclk;
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struct clk *sample_clk;
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struct platform_device *pdev;
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struct atmel_abdac_dma dma;
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struct snd_pcm_hw_constraint_list constraints_rates;
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struct snd_pcm_substream *substream;
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struct snd_card *card;
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struct snd_pcm *pcm;
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void __iomem *regs;
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unsigned long flags;
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unsigned int rates[MAX_NUM_RATES];
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unsigned int rates_num;
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int irq;
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};
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#define get_dac(card) ((struct atmel_abdac *)(card)->private_data)
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/* This function is called by the DMA driver. */
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static void atmel_abdac_dma_period_done(void *arg)
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{
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struct atmel_abdac *dac = arg;
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snd_pcm_period_elapsed(dac->substream);
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}
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static int atmel_abdac_prepare_dma(struct atmel_abdac *dac,
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struct snd_pcm_substream *substream,
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enum dma_data_direction direction)
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{
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struct dma_chan *chan = dac->dma.chan;
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struct dw_cyclic_desc *cdesc;
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned long buffer_len, period_len;
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/*
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* We don't do DMA on "complex" transfers, i.e. with
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* non-halfword-aligned buffers or lengths.
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*/
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if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
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dev_dbg(&dac->pdev->dev, "too complex transfer\n");
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return -EINVAL;
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}
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buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
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period_len = frames_to_bytes(runtime, runtime->period_size);
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cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
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period_len, DMA_TO_DEVICE);
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if (IS_ERR(cdesc)) {
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dev_dbg(&dac->pdev->dev, "could not prepare cyclic DMA\n");
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return PTR_ERR(cdesc);
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}
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cdesc->period_callback = atmel_abdac_dma_period_done;
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cdesc->period_callback_param = dac;
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dac->dma.cdesc = cdesc;
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set_bit(DMA_READY, &dac->flags);
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return 0;
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}
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static struct snd_pcm_hardware atmel_abdac_hw = {
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.info = (SNDRV_PCM_INFO_MMAP
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| SNDRV_PCM_INFO_MMAP_VALID
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| SNDRV_PCM_INFO_INTERLEAVED
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| SNDRV_PCM_INFO_BLOCK_TRANSFER
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| SNDRV_PCM_INFO_RESUME
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| SNDRV_PCM_INFO_PAUSE),
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.formats = (SNDRV_PCM_FMTBIT_S16_BE),
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.rates = (SNDRV_PCM_RATE_KNOT),
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.rate_min = RATE_MIN,
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.rate_max = RATE_MAX,
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.channels_min = 2,
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.channels_max = 2,
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.buffer_bytes_max = 64 * 4096,
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.period_bytes_min = 4096,
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.period_bytes_max = 4096,
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.periods_min = 6,
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.periods_max = 64,
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};
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static int atmel_abdac_open(struct snd_pcm_substream *substream)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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dac->substream = substream;
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atmel_abdac_hw.rate_max = dac->rates[dac->rates_num - 1];
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atmel_abdac_hw.rate_min = dac->rates[0];
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substream->runtime->hw = atmel_abdac_hw;
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return snd_pcm_hw_constraint_list(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_RATE, &dac->constraints_rates);
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}
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static int atmel_abdac_close(struct snd_pcm_substream *substream)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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dac->substream = NULL;
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return 0;
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}
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static int atmel_abdac_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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int retval;
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retval = snd_pcm_lib_malloc_pages(substream,
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params_buffer_bytes(hw_params));
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if (retval < 0)
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return retval;
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/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
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if (retval == 1)
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if (test_and_clear_bit(DMA_READY, &dac->flags))
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dw_dma_cyclic_free(dac->dma.chan);
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return retval;
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}
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static int atmel_abdac_hw_free(struct snd_pcm_substream *substream)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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if (test_and_clear_bit(DMA_READY, &dac->flags))
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dw_dma_cyclic_free(dac->dma.chan);
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return snd_pcm_lib_free_pages(substream);
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}
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static int atmel_abdac_prepare(struct snd_pcm_substream *substream)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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int retval;
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retval = clk_set_rate(dac->sample_clk, 256 * substream->runtime->rate);
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if (retval)
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return retval;
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if (!test_bit(DMA_READY, &dac->flags))
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retval = atmel_abdac_prepare_dma(dac, substream, DMA_TO_DEVICE);
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return retval;
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}
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static int atmel_abdac_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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int retval = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
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case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
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case SNDRV_PCM_TRIGGER_START:
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clk_enable(dac->sample_clk);
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retval = dw_dma_cyclic_start(dac->dma.chan);
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if (retval)
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goto out;
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dac_writel(dac, CTRL, DAC_BIT(EN));
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
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case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
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case SNDRV_PCM_TRIGGER_STOP:
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dw_dma_cyclic_stop(dac->dma.chan);
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dac_writel(dac, DATA, 0);
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dac_writel(dac, CTRL, 0);
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clk_disable(dac->sample_clk);
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break;
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default:
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retval = -EINVAL;
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break;
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}
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out:
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return retval;
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}
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static snd_pcm_uframes_t
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atmel_abdac_pointer(struct snd_pcm_substream *substream)
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{
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struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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snd_pcm_uframes_t frames;
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unsigned long bytes;
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bytes = dw_dma_get_src_addr(dac->dma.chan);
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bytes -= runtime->dma_addr;
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frames = bytes_to_frames(runtime, bytes);
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if (frames >= runtime->buffer_size)
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frames -= runtime->buffer_size;
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return frames;
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}
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static irqreturn_t abdac_interrupt(int irq, void *dev_id)
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{
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struct atmel_abdac *dac = dev_id;
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u32 status;
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status = dac_readl(dac, INT_STATUS);
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if (status & DAC_BIT(UNDERRUN)) {
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dev_err(&dac->pdev->dev, "underrun detected\n");
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dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
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} else {
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dev_err(&dac->pdev->dev, "spurious interrupt (status=0x%x)\n",
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status);
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dac_writel(dac, INT_CLR, status);
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}
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return IRQ_HANDLED;
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}
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static struct snd_pcm_ops atmel_abdac_ops = {
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.open = atmel_abdac_open,
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.close = atmel_abdac_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = atmel_abdac_hw_params,
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.hw_free = atmel_abdac_hw_free,
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.prepare = atmel_abdac_prepare,
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.trigger = atmel_abdac_trigger,
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.pointer = atmel_abdac_pointer,
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};
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static int __devinit atmel_abdac_pcm_new(struct atmel_abdac *dac)
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{
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struct snd_pcm_hardware hw = atmel_abdac_hw;
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struct snd_pcm *pcm;
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int retval;
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retval = snd_pcm_new(dac->card, dac->card->shortname,
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dac->pdev->id, 1, 0, &pcm);
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if (retval)
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return retval;
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strcpy(pcm->name, dac->card->shortname);
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pcm->private_data = dac;
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pcm->info_flags = 0;
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dac->pcm = pcm;
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snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_abdac_ops);
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retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
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&dac->pdev->dev, hw.periods_min * hw.period_bytes_min,
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hw.buffer_bytes_max);
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return retval;
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}
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static bool filter(struct dma_chan *chan, void *slave)
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{
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struct dw_dma_slave *dws = slave;
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if (dws->dma_dev == chan->device->dev) {
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chan->private = dws;
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return true;
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} else
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return false;
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}
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static int set_sample_rates(struct atmel_abdac *dac)
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{
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long new_rate = RATE_MAX;
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int retval = -EINVAL;
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int index = 0;
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/* we start at 192 kHz and work our way down to 5112 Hz */
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while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) {
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new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate);
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if (new_rate < 0)
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break;
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/* make sure we are below the ABDAC clock */
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if (new_rate <= clk_get_rate(dac->pclk)) {
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dac->rates[index] = new_rate / 256;
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index++;
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}
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/* divide by 256 and then by two to get next rate */
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new_rate /= 256 * 2;
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}
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if (index) {
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int i;
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/* reverse array, smallest go first */
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for (i = 0; i < (index / 2); i++) {
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unsigned int tmp = dac->rates[index - 1 - i];
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dac->rates[index - 1 - i] = dac->rates[i];
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dac->rates[i] = tmp;
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}
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dac->constraints_rates.count = index;
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dac->constraints_rates.list = dac->rates;
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dac->constraints_rates.mask = 0;
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dac->rates_num = index;
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retval = 0;
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}
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return retval;
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}
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static int __devinit atmel_abdac_probe(struct platform_device *pdev)
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{
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struct snd_card *card;
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struct atmel_abdac *dac;
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struct resource *regs;
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struct atmel_abdac_pdata *pdata;
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struct clk *pclk;
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struct clk *sample_clk;
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int retval;
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int irq;
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!regs) {
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dev_dbg(&pdev->dev, "no memory resource\n");
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return -ENXIO;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_dbg(&pdev->dev, "could not get IRQ number\n");
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return irq;
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}
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pdata = pdev->dev.platform_data;
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if (!pdata) {
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dev_dbg(&pdev->dev, "no platform data\n");
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return -ENXIO;
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}
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pclk = clk_get(&pdev->dev, "pclk");
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if (IS_ERR(pclk)) {
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dev_dbg(&pdev->dev, "no peripheral clock\n");
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return PTR_ERR(pclk);
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}
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sample_clk = clk_get(&pdev->dev, "sample_clk");
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if (IS_ERR(pclk)) {
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dev_dbg(&pdev->dev, "no sample clock\n");
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retval = PTR_ERR(pclk);
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goto out_put_pclk;
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}
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clk_enable(pclk);
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retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
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THIS_MODULE, sizeof(struct atmel_abdac), &card);
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if (retval) {
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dev_dbg(&pdev->dev, "could not create sound card device\n");
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goto out_put_sample_clk;
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}
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dac = get_dac(card);
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dac->irq = irq;
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dac->card = card;
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dac->pclk = pclk;
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dac->sample_clk = sample_clk;
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dac->pdev = pdev;
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retval = set_sample_rates(dac);
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if (retval < 0) {
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dev_dbg(&pdev->dev, "could not set supported rates\n");
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goto out_free_card;
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}
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dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
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if (!dac->regs) {
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dev_dbg(&pdev->dev, "could not remap register memory\n");
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goto out_free_card;
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}
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/* make sure the DAC is silent and disabled */
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dac_writel(dac, DATA, 0);
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dac_writel(dac, CTRL, 0);
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retval = request_irq(irq, abdac_interrupt, 0, "abdac", dac);
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if (retval) {
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dev_dbg(&pdev->dev, "could not request irq\n");
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goto out_unmap_regs;
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}
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snd_card_set_dev(card, &pdev->dev);
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if (pdata->dws.dma_dev) {
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struct dw_dma_slave *dws = &pdata->dws;
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dma_cap_mask_t mask;
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dws->tx_reg = regs->start + DAC_DATA;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dac->dma.chan = dma_request_channel(mask, filter, dws);
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}
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if (!pdata->dws.dma_dev || !dac->dma.chan) {
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dev_dbg(&pdev->dev, "DMA not available\n");
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retval = -ENODEV;
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goto out_unset_card_dev;
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}
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strcpy(card->driver, "Atmel ABDAC");
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strcpy(card->shortname, "Atmel ABDAC");
|
|
sprintf(card->longname, "Atmel Audio Bitstream DAC");
|
|
|
|
retval = atmel_abdac_pcm_new(dac);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register ABDAC pcm device\n");
|
|
goto out_release_dma;
|
|
}
|
|
|
|
retval = snd_card_register(card);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register sound card\n");
|
|
goto out_release_dma;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, card);
|
|
|
|
dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n",
|
|
dac->regs, dev_name(&dac->dma.chan->dev->device));
|
|
|
|
return retval;
|
|
|
|
out_release_dma:
|
|
dma_release_channel(dac->dma.chan);
|
|
dac->dma.chan = NULL;
|
|
out_unset_card_dev:
|
|
snd_card_set_dev(card, NULL);
|
|
free_irq(irq, dac);
|
|
out_unmap_regs:
|
|
iounmap(dac->regs);
|
|
out_free_card:
|
|
snd_card_free(card);
|
|
out_put_sample_clk:
|
|
clk_put(sample_clk);
|
|
clk_disable(pclk);
|
|
out_put_pclk:
|
|
clk_put(pclk);
|
|
return retval;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int atmel_abdac_suspend(struct platform_device *pdev, pm_message_t msg)
|
|
{
|
|
struct snd_card *card = platform_get_drvdata(pdev);
|
|
struct atmel_abdac *dac = card->private_data;
|
|
|
|
dw_dma_cyclic_stop(dac->dma.chan);
|
|
clk_disable(dac->sample_clk);
|
|
clk_disable(dac->pclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int atmel_abdac_resume(struct platform_device *pdev)
|
|
{
|
|
struct snd_card *card = platform_get_drvdata(pdev);
|
|
struct atmel_abdac *dac = card->private_data;
|
|
|
|
clk_enable(dac->pclk);
|
|
clk_enable(dac->sample_clk);
|
|
if (test_bit(DMA_READY, &dac->flags))
|
|
dw_dma_cyclic_start(dac->dma.chan);
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define atmel_abdac_suspend NULL
|
|
#define atmel_abdac_resume NULL
|
|
#endif
|
|
|
|
static int __devexit atmel_abdac_remove(struct platform_device *pdev)
|
|
{
|
|
struct snd_card *card = platform_get_drvdata(pdev);
|
|
struct atmel_abdac *dac = get_dac(card);
|
|
|
|
clk_put(dac->sample_clk);
|
|
clk_disable(dac->pclk);
|
|
clk_put(dac->pclk);
|
|
|
|
dma_release_channel(dac->dma.chan);
|
|
dac->dma.chan = NULL;
|
|
snd_card_set_dev(card, NULL);
|
|
iounmap(dac->regs);
|
|
free_irq(dac->irq, dac);
|
|
snd_card_free(card);
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver atmel_abdac_driver = {
|
|
.remove = __devexit_p(atmel_abdac_remove),
|
|
.driver = {
|
|
.name = "atmel_abdac",
|
|
},
|
|
.suspend = atmel_abdac_suspend,
|
|
.resume = atmel_abdac_resume,
|
|
};
|
|
|
|
static int __init atmel_abdac_init(void)
|
|
{
|
|
return platform_driver_probe(&atmel_abdac_driver,
|
|
atmel_abdac_probe);
|
|
}
|
|
module_init(atmel_abdac_init);
|
|
|
|
static void __exit atmel_abdac_exit(void)
|
|
{
|
|
platform_driver_unregister(&atmel_abdac_driver);
|
|
}
|
|
module_exit(atmel_abdac_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)");
|
|
MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");
|