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7aadaa988c
All gp or fixed counters have been reprogrammed using PERF_TYPE_RAW, which means that the table that maps perf_hw_id to event select values is no longer useful, at least for AMD. For Intel, the logic to check if the pmu event reported by Intel cpuid is not available is still required, in which case pmc_perf_hw_id() could be renamed to hw_event_is_unavail() and a bool value is returned to replace the semantics of "PERF_COUNT_HW_MAX+1". Signed-off-by: Like Xu <likexu@tencent.com> Message-Id: <20220518132512.37864-12-likexu@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
31 lines
933 B
C
31 lines
933 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#if !defined(KVM_X86_PMU_OP) || !defined(KVM_X86_PMU_OP_OPTIONAL)
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BUILD_BUG_ON(1)
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#endif
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/*
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* KVM_X86_PMU_OP() and KVM_X86_PMU_OP_OPTIONAL() are used to help generate
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* both DECLARE/DEFINE_STATIC_CALL() invocations and
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* "static_call_update()" calls.
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*
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* KVM_X86_PMU_OP_OPTIONAL() can be used for those functions that can have
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* a NULL definition, for example if "static_call_cond()" will be used
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* at the call sites.
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*/
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KVM_X86_PMU_OP(hw_event_available)
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KVM_X86_PMU_OP(pmc_is_enabled)
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KVM_X86_PMU_OP(pmc_idx_to_pmc)
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KVM_X86_PMU_OP(rdpmc_ecx_to_pmc)
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KVM_X86_PMU_OP(msr_idx_to_pmc)
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KVM_X86_PMU_OP(is_valid_rdpmc_ecx)
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KVM_X86_PMU_OP(is_valid_msr)
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KVM_X86_PMU_OP(get_msr)
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KVM_X86_PMU_OP(set_msr)
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KVM_X86_PMU_OP(refresh)
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KVM_X86_PMU_OP(init)
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KVM_X86_PMU_OP(reset)
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KVM_X86_PMU_OP_OPTIONAL(deliver_pmi)
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KVM_X86_PMU_OP_OPTIONAL(cleanup)
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#undef KVM_X86_PMU_OP
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#undef KVM_X86_PMU_OP_OPTIONAL
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