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Weili Qian ff3ddca9ca crypto: hisilicon/qm - fix the type value of aeq
The type of aeq has only 4bits in dw0 17 to 20bits, but 15bits(17 to
31bits) are read in function qm_aeq_thread(). The remaining 11bits(21
to 31bits) are reserved for aeq, but may not be 0. To avoid getting
incorrect value of type, other bits are cleared.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-05 18:16:30 +08:00
arch crypto: x86/aesni - Perform address alignment early for XTS mode 2023-10-05 18:16:30 +08:00
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drivers crypto: hisilicon/qm - fix the type value of aeq 2023-10-05 18:16:30 +08:00
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include crypto: hisilicon/qm - fix PF queue parameter issue 2023-10-05 18:16:30 +08:00
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Linux kernel
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