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The AR71XX/AR9XXX SoC have a simple reset controller with one bit per reset line. Signed-off-by: Alban Bedel <albeu@free.fr> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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.. | ||
sti | ||
core.c | ||
Kconfig | ||
Makefile | ||
reset-ath79.c | ||
reset-berlin.c | ||
reset-socfpga.c | ||
reset-sunxi.c |