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![Wolfram Sang](/assets/img/avatar_default.png)
We have a central copy of the GPL for that. Some addresses were already outdated. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
326 lines
8.3 KiB
C
326 lines
8.3 KiB
C
/*
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Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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*/
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/*
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This module must be considered BETA unless and until
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the chipset manufacturer releases a datasheet.
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The register definitions are based on the SiS630.
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This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
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for just about every machine for which users have reported.
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If this module isn't detecting your 96x south bridge, have a
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look there.
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We assume there can only be one SiS96x with one SMBus interface.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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/* base address register in PCI config space */
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#define SIS96x_BAR 0x04
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/* SiS96x SMBus registers */
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#define SMB_STS 0x00
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#define SMB_EN 0x01
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#define SMB_CNT 0x02
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#define SMB_HOST_CNT 0x03
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#define SMB_ADDR 0x04
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#define SMB_CMD 0x05
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#define SMB_PCOUNT 0x06
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#define SMB_COUNT 0x07
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#define SMB_BYTE 0x08
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#define SMB_DEV_ADDR 0x10
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#define SMB_DB0 0x11
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#define SMB_DB1 0x12
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#define SMB_SAA 0x13
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/* register count for request_region */
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#define SMB_IOSIZE 0x20
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/* Other settings */
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#define MAX_TIMEOUT 500
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/* SiS96x SMBus constants */
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#define SIS96x_QUICK 0x00
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#define SIS96x_BYTE 0x01
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#define SIS96x_BYTE_DATA 0x02
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#define SIS96x_WORD_DATA 0x03
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#define SIS96x_PROC_CALL 0x04
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#define SIS96x_BLOCK_DATA 0x05
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static struct pci_driver sis96x_driver;
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static struct i2c_adapter sis96x_adapter;
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static u16 sis96x_smbus_base;
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static inline u8 sis96x_read(u8 reg)
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{
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return inb(sis96x_smbus_base + reg) ;
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}
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static inline void sis96x_write(u8 reg, u8 data)
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{
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outb(data, sis96x_smbus_base + reg) ;
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}
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/* Execute a SMBus transaction.
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int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
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*/
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static int sis96x_transaction(int size)
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{
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int temp;
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int result = 0;
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int timeout = 0;
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dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
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/* Make sure the SMBus host is ready to start transmitting */
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if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
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dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
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"Resetting...\n", temp);
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/* kill the transaction */
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sis96x_write(SMB_HOST_CNT, 0x20);
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/* check it again */
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if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
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dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
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return -EBUSY;
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} else {
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dev_dbg(&sis96x_adapter.dev, "Successful\n");
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}
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}
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/* Turn off timeout interrupts, set fast host clock */
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sis96x_write(SMB_CNT, 0x20);
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/* clear all (sticky) status flags */
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temp = sis96x_read(SMB_STS);
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sis96x_write(SMB_STS, temp & 0x1e);
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/* start the transaction by setting bit 4 and size bits */
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sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
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/* We will always wait for a fraction of a second! */
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do {
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msleep(1);
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temp = sis96x_read(SMB_STS);
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} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout > MAX_TIMEOUT) {
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dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
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result = -ETIMEDOUT;
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}
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/* device error - probably missing ACK */
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if (temp & 0x02) {
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dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
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result = -ENXIO;
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}
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/* bus collision */
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if (temp & 0x04) {
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dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
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result = -EIO;
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}
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/* Finish up by resetting the bus */
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sis96x_write(SMB_STS, temp);
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if ((temp = sis96x_read(SMB_STS))) {
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dev_dbg(&sis96x_adapter.dev, "Failed reset at "
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"end of transaction! (0x%02x)\n", temp);
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}
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return result;
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}
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/* Return negative errno on error. */
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static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data * data)
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{
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int status;
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switch (size) {
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case I2C_SMBUS_QUICK:
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sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
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size = SIS96x_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
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if (read_write == I2C_SMBUS_WRITE)
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sis96x_write(SMB_CMD, command);
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size = SIS96x_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
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sis96x_write(SMB_CMD, command);
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if (read_write == I2C_SMBUS_WRITE)
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sis96x_write(SMB_BYTE, data->byte);
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size = SIS96x_BYTE_DATA;
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break;
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case I2C_SMBUS_PROC_CALL:
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case I2C_SMBUS_WORD_DATA:
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sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
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sis96x_write(SMB_CMD, command);
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if (read_write == I2C_SMBUS_WRITE) {
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sis96x_write(SMB_BYTE, data->word & 0xff);
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sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
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}
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size = (size == I2C_SMBUS_PROC_CALL ?
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SIS96x_PROC_CALL : SIS96x_WORD_DATA);
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break;
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default:
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dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
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return -EOPNOTSUPP;
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}
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status = sis96x_transaction(size);
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if (status)
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return status;
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if ((size != SIS96x_PROC_CALL) &&
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((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
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return 0;
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switch (size) {
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case SIS96x_BYTE:
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case SIS96x_BYTE_DATA:
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data->byte = sis96x_read(SMB_BYTE);
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break;
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case SIS96x_WORD_DATA:
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case SIS96x_PROC_CALL:
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data->word = sis96x_read(SMB_BYTE) +
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(sis96x_read(SMB_BYTE + 1) << 8);
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break;
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}
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return 0;
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}
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static u32 sis96x_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_PROC_CALL;
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}
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static const struct i2c_algorithm smbus_algorithm = {
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.smbus_xfer = sis96x_access,
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.functionality = sis96x_func,
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};
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static struct i2c_adapter sis96x_adapter = {
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.owner = THIS_MODULE,
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.class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
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.algo = &smbus_algorithm,
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};
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static const struct pci_device_id sis96x_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
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{ 0, }
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};
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MODULE_DEVICE_TABLE (pci, sis96x_ids);
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static int sis96x_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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u16 ww = 0;
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int retval;
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if (sis96x_smbus_base) {
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dev_err(&dev->dev, "Only one device supported.\n");
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return -EBUSY;
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}
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pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
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if (PCI_CLASS_SERIAL_SMBUS != ww) {
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dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
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return -ENODEV;
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}
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sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
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if (!sis96x_smbus_base) {
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dev_err(&dev->dev, "SiS96x SMBus base address "
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"not initialized!\n");
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return -EINVAL;
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}
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dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
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sis96x_smbus_base);
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retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]);
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if (retval)
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return -ENODEV;
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/* Everything is happy, let's grab the memory and set things up. */
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if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
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sis96x_driver.name)) {
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dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
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"already in use!\n", sis96x_smbus_base,
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sis96x_smbus_base + SMB_IOSIZE - 1);
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sis96x_smbus_base = 0;
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return -EINVAL;
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}
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/* set up the sysfs linkage to our parent device */
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sis96x_adapter.dev.parent = &dev->dev;
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snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
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"SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
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if ((retval = i2c_add_adapter(&sis96x_adapter))) {
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dev_err(&dev->dev, "Couldn't register adapter!\n");
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release_region(sis96x_smbus_base, SMB_IOSIZE);
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sis96x_smbus_base = 0;
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}
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return retval;
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}
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static void sis96x_remove(struct pci_dev *dev)
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{
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if (sis96x_smbus_base) {
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i2c_del_adapter(&sis96x_adapter);
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release_region(sis96x_smbus_base, SMB_IOSIZE);
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sis96x_smbus_base = 0;
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}
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}
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static struct pci_driver sis96x_driver = {
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.name = "sis96x_smbus",
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.id_table = sis96x_ids,
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.probe = sis96x_probe,
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.remove = sis96x_remove,
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};
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module_pci_driver(sis96x_driver);
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MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
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MODULE_DESCRIPTION("SiS96x SMBus driver");
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MODULE_LICENSE("GPL");
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