diff --git a/include/grub/mips/loongson.h b/include/grub/mips/loongson.h
index 9c1ba6da9..8441b6c0f 100644
--- a/include/grub/mips/loongson.h
+++ b/include/grub/mips/loongson.h
@@ -54,4 +54,8 @@
 #define GRUB_CPU_LOONGSON_COP0_CACHE_TAGLO $28
 #define GRUB_CPU_LOONGSON_COP0_CACHE_TAGHI $29
 
+#define GRUB_CPU_LOONGSON_LIOCFG   0xbfe00108
+#define GRUB_CPU_LOONGSON_ROM_DELAY_OFFSET 2
+#define GRUB_CPU_LOONGSON_ROM_DELAY_MASK 0x1f
+
 #endif
diff --git a/kern/mips/yeeloong/fwstart.S b/kern/mips/yeeloong/fwstart.S
index dc5dabc6c..d48acabc8 100644
--- a/kern/mips/yeeloong/fwstart.S
+++ b/kern/mips/yeeloong/fwstart.S
@@ -609,6 +609,15 @@ continue:
 	lui $a0, %hi(caches_enabled)
 	bal message
 	  addiu $a0, $a0, %lo(caches_enabled)
+
+	/* Set ROM delay cycles to 1.  */
+	lui $t0, %hi(GRUB_CPU_LOONGSON_LIOCFG)
+	lw  $t1, %lo(GRUB_CPU_LOONGSON_LIOCFG) ($t0)
+	addiu $t2, $zero, ~(GRUB_CPU_LOONGSON_ROM_DELAY_MASK \
+	                    << GRUB_CPU_LOONGSON_ROM_DELAY_OFFSET)
+	and $t1, $t1, $t2
+	ori $t1, $t1, (1 << GRUB_CPU_LOONGSON_ROM_DELAY_OFFSET)
+	sw  $t1, %lo(GRUB_CPU_LOONGSON_LIOCFG) ($t0)
 	
 	addiu $a0, $zero, -1
 	addiu $a1, $zero, -1