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Macroify command and status registers

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This commit is contained in:
Vladimir 'phcoder' Serbinenko 2010-05-23 02:41:16 +02:00
parent e51a665432
commit 27cd973df6
2 changed files with 38 additions and 4 deletions
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13
include/grub/pci.h
View file

@ -68,6 +68,19 @@
#define GRUB_PCI_REG_MIN_GNT 0x3e #define GRUB_PCI_REG_MIN_GNT 0x3e
#define GRUB_PCI_REG_MAX_LAT 0x3f #define GRUB_PCI_REG_MAX_LAT 0x3f
#define GRUB_PCI_COMMAND_IO_ENABLED 0x0001
#define GRUB_PCI_COMMAND_MEM_ENABLED 0x0002
#define GRUB_PCI_COMMAND_BUS_MASTER 0x0004
#define GRUB_PCI_COMMAND_PARITY_ERROR 0x0040
#define GRUB_PCI_COMMAND_SERR_ENABLE 0x0100
#define GRUB_PCI_STATUS_CAPABILITIES 0x0010
#define GRUB_PCI_STATUS_66MHZ_CAPABLE 0x0020
#define GRUB_PCI_STATUS_FAST_B2B_CAPABLE 0x0080
#define GRUB_PCI_STATUS_DEVSEL_TIMING_SHIFT 9
#define GRUB_PCI_STATUS_DEVSEL_TIMING_MASK 0x0600
#ifndef ASM_FILE #ifndef ASM_FILE
typedef grub_uint32_t grub_pci_id_t; typedef grub_uint32_t grub_pci_id_t;

29
kern/mips/yeeloong/init.c
View file

@ -82,13 +82,26 @@ init_pci (void)
addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0); addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
grub_pci_write (addr, 0x5025000); grub_pci_write (addr, 0x5025000);
addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND); addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
grub_pci_write (addr, 0x2100146); grub_pci_write_word (addr, GRUB_PCI_COMMAND_SERR_ENABLE
| GRUB_PCI_COMMAND_PARITY_ERROR
| GRUB_PCI_COMMAND_BUS_MASTER
| GRUB_PCI_COMMAND_MEM_ENABLED);
addr = grub_pci_make_address (dev, GRUB_PCI_REG_STATUS);
grub_pci_write_word (addr, 0x0200 | GRUB_PCI_STATUS_CAPABILITIES);
break; break;
case GRUB_YEELOONG_EHCI_PCIID: case GRUB_YEELOONG_EHCI_PCIID:
addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0); addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
grub_pci_write (addr, 0x5026000); grub_pci_write (addr, 0x5026000);
addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND); addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
grub_pci_write (addr, 0x2100146); grub_pci_write_word (addr, GRUB_PCI_COMMAND_SERR_ENABLE
| GRUB_PCI_COMMAND_PARITY_ERROR
| GRUB_PCI_COMMAND_BUS_MASTER
| GRUB_PCI_COMMAND_MEM_ENABLED);
addr = grub_pci_make_address (dev, GRUB_PCI_REG_STATUS);
grub_pci_write_word (addr, (1 << GRUB_PCI_STATUS_DEVSEL_TIMING_SHIFT)
| GRUB_PCI_STATUS_CAPABILITIES);
break; break;
} }
return 0; return 0;
@ -98,8 +111,16 @@ init_pci (void)
*((volatile grub_uint32_t *) GRUB_CPU_LOONGSON_PCI_HIT1_SEL_HI) = 0xffffffff; *((volatile grub_uint32_t *) GRUB_CPU_LOONGSON_PCI_HIT1_SEL_HI) = 0xffffffff;
/* Setup PCI controller. */ /* Setup PCI controller. */
*((volatile grub_uint32_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER *((volatile grub_uint16_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER
+ GRUB_PCI_REG_COMMAND)) = 0x22b00046; + GRUB_PCI_REG_COMMAND))
= GRUB_PCI_COMMAND_PARITY_ERROR | GRUB_PCI_COMMAND_BUS_MASTER
| GRUB_PCI_COMMAND_MEM_ENABLED;
*((volatile grub_uint16_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER
+ GRUB_PCI_REG_STATUS))
= (1 << GRUB_PCI_STATUS_DEVSEL_TIMING_SHIFT)
| GRUB_PCI_STATUS_FAST_B2B_CAPABLE | GRUB_PCI_STATUS_66MHZ_CAPABLE
| GRUB_PCI_STATUS_CAPABILITIES;
*((volatile grub_uint32_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER *((volatile grub_uint32_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER
+ GRUB_PCI_REG_CACHELINE)) = 0xff; + GRUB_PCI_REG_CACHELINE)) = 0xff;
*((volatile grub_uint32_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER *((volatile grub_uint32_t *) (GRUB_MACHINE_PCI_CONTROLLER_HEADER