Improvements for Apple?
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4 changed files with 87 additions and 66 deletions
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@ -27,30 +27,28 @@
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#ifdef __x86_64__
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#define RAX %rax
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#define RCX %rcx
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#define RDX %rdx
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#define RDI %rdi
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#define RSI %rdi
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#else
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#define RAX %eax
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#define RCX %ecx
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#define RDX %edx
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#define RDI %edi
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#define RSI %esi
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#endif
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/* Apple's linker has a problem with 64-bit relocations. */
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#if defined (__apple__) || ! defined (__x86_64__)
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#define RSIA %esi
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#define RAXA %eax
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#else
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#define RSIA %rsi
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#define RAXA %rax
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#endif
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/* The code segment of the protected mode. */
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#define CODE_SEGMENT 0x10
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/* The data segment of the protected mode. */
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#define DATA_SEGMENT 0x18
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.p2align 4 /* force 16-byte alignment */
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RELOCATOR_VARIABLE(start)
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#ifdef BACKWARD
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base:
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L_base:
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#endif
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cli
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@ -105,14 +103,14 @@ RELOCATOR_VARIABLE(size)
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#ifndef BACKWARD
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add RCX, RAX
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#endif
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addq $0x3, RCX
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shrq $2, RCX
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add $0x3, RCX
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shr $2, RCX
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#ifdef BACKWARD
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/* Backward movsl is implicitly off-by-four. compensate that. */
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subq $4, RSI
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subq $4, RDI
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sub $4, RSI
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sub $4, RDI
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/* Backward copy. */
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std
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@ -129,27 +127,27 @@ RELOCATOR_VARIABLE(size)
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/* %rax contains now our new 'base'. */
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mov RAX, RSI
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add $(cont0 - base), RAXA
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add $(L_cont0 - L_base), RAX
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jmp *RAX
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cont0:
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lea (cont1 - base) (RSIA, 1), RAXA
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movl %eax, (jump_vector - base) (RSIA, 1)
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L_cont0:
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lea (L_cont1 - L_base) (RSI, 1), RAX
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movl %eax, (L_jump_vector - L_base) (RSI, 1)
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lea (gdt - base) (RSIA, 1), RAXA
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mov RAXA, (gdt_addr - base) (RSIA, 1)
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lea (L_gdt - L_base) (RSI, 1), RAX
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mov RAX, (L_gdt_addr - L_base) (RSI, 1)
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/* Switch to compatibility mode. */
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lgdt (gdtdesc - base) (RSIA, 1)
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lgdt (L_gdtdesc - L_base) (RSI, 1)
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/* Update %cs. Thanks to David Miller for pointing this mistake out. */
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ljmp *(jump_vector - base) (RSIA, 1)
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ljmp *(L_jump_vector - L_base) (RSI, 1)
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cont1:
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L_cont1:
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.code32
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/* Update other registers. */
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movl $GRUB_MEMORY_MACHINE_PROT_MODE_DSEG, %eax
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movl $DATA_SEGMENT, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %fs
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@ -158,22 +156,22 @@ cont1:
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/* Disable paging. */
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movl %cr0, %eax
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andl $0x7fffffff, %eax
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andl $(~GRUB_MEMORY_CPU_CR0_PAGING_ON), %eax
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movl %eax, %cr0
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/* Disable amd64. */
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movl $0xc0000080, %ecx
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movl $GRUB_MEMORY_CPU_AMD64_MSR, %ecx
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rdmsr
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andl $0xfffffeff, %eax
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andl $(~GRUB_MEMORY_CPU_AMD64_MSR_ON), %eax
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wrmsr
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/* Turn off PAE. */
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movl %cr4, %eax
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andl $0xffffffcf, %eax
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andl $GRUB_MEMORY_CPU_CR4_PAE_ON, %eax
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movl %eax, %cr4
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jmp cont2
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cont2:
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jmp L_cont2
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L_cont2:
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.code32
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/* mov imm32, %eax */
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@ -212,44 +210,25 @@ RELOCATOR_VARIABLE (eip)
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.long 0
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.word 0x08
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/* GDT. The same as is used in 32-bit GRUB. */
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/* GDT. Copied from loader/i386/linux.c. */
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.p2align 4
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gdt:
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.word 0, 0
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.byte 0, 0, 0, 0
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L_gdt:
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/* NULL. */
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.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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/* Reserved. */
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.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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/* -- code segment --
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* base = 0x00000000, limit = 0xFFFFF (4 KiB Granularity), present
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* type = 32bit code execute/read, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x9A, 0xCF, 0
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/* Code segment. */
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.byte 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x9A, 0xCF, 0x00
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/* -- data segment --
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* base = 0x00000000, limit 0xFFFFF (4 KiB Granularity), present
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* type = 32 bit data read/write, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x92, 0xCF, 0
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/* -- 16 bit real mode CS --
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* base = 0x00000000, limit 0x0FFFF (1 B Granularity), present
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* type = 16 bit code execute/read only/conforming, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x9E, 0, 0
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/* -- 16 bit real mode DS --
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* base = 0x00000000, limit 0x0FFFF (1 B Granularity), present
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* type = 16 bit data read/write, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x92, 0, 0
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/* Data segment. */
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.byte 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x92, 0xCF, 0x00
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.p2align 4
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gdtdesc:
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L_gdtdesc:
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.word 0x27
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gdt_addr:
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L_gdt_addr:
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#ifdef __x86_64__
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/* Filled by the code. */
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.quad 0
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@ -259,13 +238,13 @@ gdt_addr:
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#endif
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.p2align 4
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jump_vector:
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L_jump_vector:
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/* Jump location. Is filled by the code */
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.long 0
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.long GRUB_MEMORY_MACHINE_PROT_MODE_CSEG
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.long CODE_SEGMENT
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#ifndef BACKWARD
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base:
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L_base:
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#endif
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RELOCATOR_VARIABLE(end)
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