Leif's build fixes

This commit is contained in:
Leif Lindholm 2013-05-03 14:41:08 +02:00 committed by Vladimir 'phcoder' Serbinenko
parent fa8058da9e
commit bb9f92b9b1
8 changed files with 90 additions and 92 deletions

View file

@ -458,3 +458,23 @@ dnl program.
AC_DEFUN([grub_TRANSFORM],[dnl AC_DEFUN([grub_TRANSFORM],[dnl
AC_SUBST(AS_TR_SH([$1]), [`AS_ECHO([$1]) | sed "$program_transform_name"`])dnl AC_SUBST(AS_TR_SH([$1]), [`AS_ECHO([$1]) | sed "$program_transform_name"`])dnl
]) ])
dnl Check if the C compiler supports `-mno-unaligned-access'.
AC_DEFUN([grub_CHECK_NO_UNALIGNED_ACCESS],[
[# foobar
nua_possible=yes]
AC_MSG_CHECKING([whether `$CC' supports `-mno-unaligned-access'])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[
int main() {
return 0;
}
]])])
[if eval "$ac_compile -S -mno-unaligned-access -o conftest.s" 2> /dev/null; then]
AC_MSG_RESULT([yes])
[rm -f conftest.s
else
nua_possible=no]
AC_MSG_RESULT([no])
[fi]
])

View file

@ -38,10 +38,7 @@ if COND_sparc64_ieee1275
LDFLAGS_PLATFORM = -Wl,-melf64_sparc -mno-relax LDFLAGS_PLATFORM = -Wl,-melf64_sparc -mno-relax
endif endif
if COND_arm if COND_arm
# Image entry point always in ARM (A32) state - ensure proper functionality if CFLAGS_PLATFORM += -mthumb-interwork -mlong-calls
# the rest is built for the Thumb (T32) state.
CFLAGS_PLATFORM += -mthumb-interwork -mno-unaligned-access -mlong-calls
CCASFLAGS_PLATFORM = -Wa,-mimplicit-it=thumb
LDFLAGS_PLATFORM = -Wl,--wrap=__clear_cache LDFLAGS_PLATFORM = -Wl,--wrap=__clear_cache
endif endif

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@ -656,6 +656,14 @@ if test x"$sap_possible" = xyes; then
TARGET_CFLAGS="$TARGET_CFLAGS -mno-stack-arg-probe" TARGET_CFLAGS="$TARGET_CFLAGS -mno-stack-arg-probe"
fi fi
# -mno-unaligned-access
if test "$target_cpu" = arm; then
grub_CHECK_NO_UNALIGNED_ACCESS
if test x"$nua_possible" = xyes; then
TARGET_CFLAGS="$TARGET_CFLAGS -mno-unaligned-access"
fi
fi
AC_ARG_ENABLE([werror], AC_ARG_ENABLE([werror],
[AS_HELP_STRING([--disable-werror], [AS_HELP_STRING([--disable-werror],
[do not use -Werror when building GRUB])]) [do not use -Werror when building GRUB])])

View file

@ -17,19 +17,22 @@
*/ */
#include <grub/symbol.h> #include <grub/symbol.h>
#include <grub/dl.h>
.file "cache.S" .file "cache.S"
.text .text
.syntax unified .syntax unified
#if !defined (__thumb2__)
.arm .arm
#define ARM(x...) x #if (__ARM_ARCH_6__ == 1)
#define THUMB(x...) .arch armv6
# define DMB mcr p15, 0, r0, c7, c10, 5
# define DSB mcr p15, 0, r0, c7, c10, 4
# define ISB mcr p15, 0, r0, c7, c5, 4
#elif (__ARM_ARCH_7A__ == 1)
# define DMB dmb
# define DSB dsb
# define ISB isb
#else #else
.thumb # error Unsupported architecture version!
#define THUMB(x...) x
#define ARM(x...)
#endif #endif
.align 2 .align 2
@ -41,22 +44,17 @@
@ r0 - *beg (inclusive) @ r0 - *beg (inclusive)
@ r1 - *end (exclusive) @ r1 - *end (exclusive)
clean_dcache_range: clean_dcache_range:
@ Clean data cache range for range to point-of-unification @ Clean data cache for range to point-of-unification
ldr r2, dlinesz ldr r2, dlinesz
sub r3, r2, #1 @ align "beg" to start of line
mvn r3, r3
and r0, r0, r3
1: cmp r0, r1 1: cmp r0, r1
bge 2f bge 2f
#ifdef DEBUG
push {r0-r2, lr}
mov r1, r2
mov r2, r0
ldr r0, =dcstr
bl EXT_C(grub_printf)
pop {r0-r2, lr}
#endif
mcr p15, 0, r0, c7, c11, 1 @ DCCMVAU mcr p15, 0, r0, c7, c11, 1 @ DCCMVAU
add r0, r0, r2 @ Next line add r0, r0, r2 @ Next line
b 1b b 1b
2: dsb 2: DSB
bx lr bx lr
@ r0 - *beg (inclusive) @ r0 - *beg (inclusive)
@ -64,29 +62,23 @@ clean_dcache_range:
invalidate_icache_range: invalidate_icache_range:
@ Invalidate instruction cache for range to point-of-unification @ Invalidate instruction cache for range to point-of-unification
ldr r2, ilinesz ldr r2, ilinesz
sub r3, r2, #1 @ align "beg" to start of line
mvn r3, r3
and r0, r0, r3
1: cmp r0, r1 1: cmp r0, r1
bge 2f bge 2f
#ifdef DEBUG
push {r0-r2, lr}
mov r1, r2
mov r2, r0
ldr r0, =icstr
bl EXT_C(grub_printf)
pop {r0-r2, lr}
#endif
mcr p15, 0, r0, c7, c5, 1 @ ICIMVAU mcr p15, 0, r0, c7, c5, 1 @ ICIMVAU
add r0, r0, r2 @ Next line add r0, r0, r2 @ Next line
b 1b b 1b
@ Branch predictor invalidate all @ Branch predictor invalidate all
2: mcr p15, 0, r0, c7, c5, 6 @ BPIALL 2: mcr p15, 0, r0, c7, c5, 6 @ BPIALL
dsb DSB
isb ISB
bx lr bx lr
@void __wrap___clear_cache(char *beg, char *end); sync_caches:
FUNCTION(__wrap___clear_cache) DMB
dmb DSB
dsb
push {r4-r6, lr} push {r4-r6, lr}
ldr r2, probed @ If first call, probe cache sizes ldr r2, probed @ If first call, probe cache sizes
cmp r2, #0 cmp r2, #0
@ -103,7 +95,8 @@ probe_caches:
push {r4-r6, lr} push {r4-r6, lr}
mrc p15, 0, r4, c0, c0, 1 @ Read Cache Type Register mrc p15, 0, r4, c0, c0, 1 @ Read Cache Type Register
mov r5, #1 mov r5, #1
ubfx r6, r4, #16, #4 @ Extract min D-cache num word log2 lsr r6, r4, #16 @ Extract min D-cache num word log2
and r6, r6, #0xf
add r6, r6, #2 @ words->bytes add r6, r6, #2 @ words->bytes
lsl r6, r5, r6 @ Convert to num bytes lsl r6, r5, r6 @ Convert to num bytes
ldr r3, =dlinesz ldr r3, =dlinesz
@ -117,11 +110,6 @@ probe_caches:
str r5, [r3] str r5, [r3]
pop {r4-r6, pc} pop {r4-r6, pc}
#ifdef DEBUG
dcstr: .asciz "cleaning %d bytes of D cache @ 0x%08x\n"
icstr: .asciz "invalidating %d bytes of I cache @ 0x%08x\n"
#endif
.align 3 .align 3
probed: .long 0 probed: .long 0
dlinesz: dlinesz:
@ -132,7 +120,7 @@ ilinesz:
@void grub_arch_sync_caches (void *address, grub_size_t len) @void grub_arch_sync_caches (void *address, grub_size_t len)
FUNCTION(grub_arch_sync_caches) FUNCTION(grub_arch_sync_caches)
add r1, r0, r1 add r1, r0, r1
b __wrap___clear_cache b sync_caches
@ r0 - CLIDR @ r0 - CLIDR
@ r1 - LoC @ r1 - LoC
@ -149,21 +137,26 @@ FUNCTION(grub_arch_sync_caches)
clean_invalidate_dcache: clean_invalidate_dcache:
push {r4-r12, lr} push {r4-r12, lr}
mrc p15, 1, r0, c0, c0, 1 @ Read CLIDR mrc p15, 1, r0, c0, c0, 1 @ Read CLIDR
ubfx r1, r0, #24, #3 @ Extract LoC lsr r1, r0, #24 @ Extract LoC
and r1, r1, #0x7
mov r2, #0 @ First level, L1 mov r2, #0 @ First level, L1
2: and r8, r0, #7 @ cache type at current level 2: and r8, r0, #7 @ cache type at current level
cmp r8, #2 cmp r8, #2
blt 5f @ instruction only, or none, skip level blt 5f @ instruction only, or none, skip level
@ set current cache level/type (for CSSIDR read) @ set current cache level/type (for CCSIDR read)
lsl r8, r2, #1 lsl r8, r2, #1
mcr p15, 2, r8, c0, c0, 0 @ Write CSSELR (level, type: data/uni) mcr p15, 2, r8, c0, c0, 0 @ Write CSSELR (level, type: data/uni)
@ read current cache information @ read current cache information
mrc p15, 1, r8, c0, c0, 0 @ Read CSSIDR mrc p15, 1, r8, c0, c0, 0 @ Read CCSIDR
ubfx r3, r8, #13, #14 @ Number of sets -1 lsr r3, r8, #13 @ Number of sets -1
ubfx r4, r8, #3, #9 @ Number of ways -1 ldr r9, =0x3fff
and r3, r3, r9
lsr r4, r8, #3 @ Number of ways -1
ldr r9, =0x1ff
and r4, r4, r9
and r7, r8, #7 @ log2(line size in words) - 2 and r7, r8, #7 @ log2(line size in words) - 2
add r7, r7, #2 @ adjust add r7, r7, #2 @ adjust
mov r8, #1 mov r8, #1
@ -188,7 +181,7 @@ clean_invalidate_dcache:
4: lsl r10, r6, r9 4: lsl r10, r6, r9
orr r11, r8, r10 @ insert way field orr r11, r8, r10 @ insert way field
@ clean line by set/way @ clean and invalidate line by set/way
mcr p15, 0, r11, c7, c14, 2 @ DCCISW mcr p15, 0, r11, c7, c14, 2 @ DCCISW
@ next way @ next way
@ -208,8 +201,8 @@ clean_invalidate_dcache:
blt 2b @ outer loop blt 2b @ outer loop
@ return @ return
6: dsb 6: DSB
isb ISB
pop {r4-r12, pc} pop {r4-r12, pc}
FUNCTION(grub_arm_disable_caches_mmu) FUNCTION(grub_arm_disable_caches_mmu)
@ -219,8 +212,8 @@ FUNCTION(grub_arm_disable_caches_mmu)
mrc p15, 0, r0, c1, c0, 0 mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #(1 << 2) bic r0, r0, #(1 << 2)
mcr p15, 0, r0, c1, c0, 0 mcr p15, 0, r0, c1, c0, 0
dsb DSB
isb ISB
@ clean/invalidate D-cache @ clean/invalidate D-cache
bl clean_invalidate_dcache bl clean_invalidate_dcache
@ -229,13 +222,13 @@ FUNCTION(grub_arm_disable_caches_mmu)
mrc p15, 0, r0, c1, c0, 0 mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #(1 << 12) bic r0, r0, #(1 << 12)
mcr p15, 0, r0, c1, c0, 0 mcr p15, 0, r0, c1, c0, 0
dsb DSB
isb ISB
@ invalidate I-cache (also invalidates branch predictors) @ invalidate I-cache (also invalidates branch predictors)
mcr p15, 0, r0, c7, c5, 0 mcr p15, 0, r0, c7, c5, 0
dsb DSB
isb ISB
@ clear SCTLR M bit @ clear SCTLR M bit
mrc p15, 0, r0, c1, c0, 0 mrc p15, 0, r0, c1, c0, 0
@ -244,8 +237,8 @@ FUNCTION(grub_arm_disable_caches_mmu)
mcr p15, 0, r0, c8, c7, 0 @ invalidate TLB mcr p15, 0, r0, c8, c7, 0 @ invalidate TLB
mcr p15, 0, r0, c7, c5, 6 @ invalidate branch predictor mcr p15, 0, r0, c7, c5, 6 @ invalidate branch predictor
dsb DSB
isb ISB
pop {r4, pc} pop {r4, pc}

View file

@ -130,10 +130,9 @@ grub_machine_get_bootlocation (char **device, char **path)
tmp = uboot_env_get ("grub_bootdev"); tmp = uboot_env_get ("grub_bootdev");
if (tmp) if (tmp)
{ {
*device = grub_malloc (grub_strlen (tmp) + 1); *device = grub_strdup (tmp);
if (*device == NULL) if (*device == NULL)
return; return;
grub_strncpy (*device, tmp, grub_strlen (tmp) + 1);
} }
else else
*device = NULL; *device = NULL;
@ -141,10 +140,9 @@ grub_machine_get_bootlocation (char **device, char **path)
tmp = uboot_env_get ("grub_bootpath"); tmp = uboot_env_get ("grub_bootpath");
if (tmp) if (tmp)
{ {
*path = grub_malloc (grub_strlen (tmp) + 1); *path = grub_strdup (tmp);
if (*path == NULL) if (*path == NULL)
return; return;
grub_strncpy (*path, tmp, grub_strlen (tmp) + 1);
} }
else else
*path = NULL; *path = NULL;

View file

@ -17,19 +17,10 @@
*/ */
#include <grub/symbol.h> #include <grub/symbol.h>
#include <grub/dl.h>
.file "setjmp.S" .file "setjmp.S"
.syntax unified .syntax unified
#if !defined (__thumb2__)
.arm .arm
#define ARM(x...) x
#define THUMB(x...)
#else
.thumb
#define THUMB(x...) x
#define ARM(x...)
#endif
.text .text
@ -37,9 +28,7 @@
* int grub_setjmp (grub_jmp_buf env) * int grub_setjmp (grub_jmp_buf env)
*/ */
FUNCTION(grub_setjmp) FUNCTION(grub_setjmp)
THUMB( mov ip, sp ) stm r0, { r4-r11, sp, lr }
THUMB( stm r0, { r4-r11, ip, lr } )
ARM( stm r0, { r4-r11, sp, lr } )
mov r0, #0 mov r0, #0
bx lr bx lr
@ -47,9 +36,7 @@ FUNCTION(grub_setjmp)
* int grub_longjmp (grub_jmp_buf env, int val) * int grub_longjmp (grub_jmp_buf env, int val)
*/ */
FUNCTION(grub_longjmp) FUNCTION(grub_longjmp)
THUMB( ldm r0, { r4-r11, ip, lr } ) ldm r0, { r4-r11, sp, lr }
THUMB( mov sp, ip )
ARM( ldm r0, { r4-r11, sp, lr } )
movs r0, r1 movs r0, r1
moveq r0, #1 moveq r0, #1
bx lr bx lr

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@ -121,6 +121,5 @@ void EXPORT_FUNC (__aeabi_llsl) (void);
void EXPORT_FUNC (__aeabi_llsr) (void); void EXPORT_FUNC (__aeabi_llsr) (void);
void EXPORT_FUNC (__aeabi_uidiv) (void); void EXPORT_FUNC (__aeabi_uidiv) (void);
void EXPORT_FUNC (__aeabi_uidivmod) (void); void EXPORT_FUNC (__aeabi_uidivmod) (void);
void EXPORT_FUNC (__wrap___clear_cache) (void *, void *);
void EXPORT_FUNC (__aeabi_ulcmp) (void); void EXPORT_FUNC (__aeabi_ulcmp) (void);
#endif #endif

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@ -29,11 +29,7 @@
#if HAVE_ASM_USCORE #if HAVE_ASM_USCORE
#ifdef ASM_FILE #ifdef ASM_FILE
# ifndef (__arm__) # define EXT_C(sym) _ ## sym
# define EXT_C(sym) _ ## sym
# else
# define EXT_C(sym) % ## sym
# endif
#else #else
# define EXT_C(sym) "_" sym # define EXT_C(sym) "_" sym
#endif #endif