Enable cache on ARM U-Boot port.
Without it the port is reidiculously slow.
This commit is contained in:
parent
943981ff65
commit
bbc52c228f
9 changed files with 182 additions and 3 deletions
|
@ -41,4 +41,33 @@ FUNCTION(grub_arm_main_id)
|
|||
|
||||
FUNCTION(grub_arm_cache_type)
|
||||
mrc p15, 0, r0, c0, c0, 1
|
||||
bx lr
|
||||
bx lr
|
||||
|
||||
FUNCTION(grub_arm_clear_mmu_v6)
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c2, c0, 2
|
||||
bx lr
|
||||
|
||||
FUNCTION(grub_arm_enable_mmu)
|
||||
mcr p15, 0, r0, c2, c0, 0
|
||||
|
||||
mvn r0, #0
|
||||
mcr p15, 0, r0, c3, c0, 0
|
||||
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #(1 << 23)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #(1 << 0)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #(1 << 2)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #(1 << 12)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
bx lr
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue