2005-12-09 Hollis Blanchard <hollis@penguinppc.org>

* configure.ac: Accept `powerpc64' as host_cpu.
	(amd64): Rename to `biarch32'.

	* kern/powerpc/cache.S (grub_arch_sync_caches): Handle
	non-cacheline-aligned addresses.

	* kern/dl.c (grub_dl_load_core): Add grub_dprintf messages.
	(grub_dl_flush_cache): Likewise.  Only call `grub_arch_sync_caches'
	if `size' is non-zero.
This commit is contained in:
hollisb 2005-12-10 05:24:59 +00:00
parent b04216abba
commit be973c1ba6
5 changed files with 148 additions and 72 deletions

View file

@ -507,9 +507,14 @@ static void
grub_dl_flush_cache (grub_dl_t mod)
{
grub_dl_segment_t seg;
for (seg = mod->segment; seg; seg = seg->next)
grub_arch_sync_caches (seg->addr, seg->size);
for (seg = mod->segment; seg; seg = seg->next) {
if (seg->size) {
grub_dprintf ("modules", "flushing 0x%x bytes at %p\n", seg->size,
seg->addr);
grub_arch_sync_caches (seg->addr, seg->size);
}
}
}
/* Load a module from core memory. */
@ -518,11 +523,12 @@ grub_dl_load_core (void *addr, grub_size_t size)
{
Elf_Ehdr *e;
grub_dl_t mod;
grub_dprintf ("modules", "module at %p, size 0x%x\n", addr, size);
e = addr;
if (grub_dl_check_header (e, size))
return 0;
if (e->e_type != ET_REL)
{
grub_error (GRUB_ERR_BAD_MODULE, "invalid ELF file type");
@ -547,6 +553,7 @@ grub_dl_load_core (void *addr, grub_size_t size)
mod->init = 0;
mod->fini = 0;
grub_dprintf ("modules", "relocating to %p\n", mod);
if (grub_dl_resolve_name (mod, e)
|| grub_dl_resolve_dependencies (mod, e)
|| grub_dl_load_segments (mod, e)
@ -559,15 +566,17 @@ grub_dl_load_core (void *addr, grub_size_t size)
}
grub_dl_flush_cache (mod);
grub_dprintf ("modules", "module name: %s\n", mod->name);
grub_dprintf ("modules", "init function: %p\n", mod->init);
grub_dl_call_init (mod);
if (grub_dl_add (mod))
{
grub_dl_unload (mod);
return 0;
}
return mod;
}

View file

@ -20,11 +20,15 @@
#define CACHE_LINE_BYTES 32
.text
.text
.align 2
.globl grub_arch_sync_caches
.align 2
.globl grub_arch_sync_caches
grub_arch_sync_caches:
/* `address' may not be CACHE_LINE_BYTES-aligned. */
andi. 6, 3, CACHE_LINE_BYTES - 1 /* Find the misalignment. */
add 4, 4, 6 /* Adjust `size' to compensate. */
/* Force the dcache lines to memory. */
li 5, 0
1: dcbst 5, 3