First compiling newreloc for ppc (not yet tested)
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6 changed files with 290 additions and 24 deletions
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@ -1,7 +1,7 @@
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/* cache.S - Flush the processor cache for a specific region. */
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/*
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* GRUB -- GRand Unified Bootloader
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* Copyright (C) 2004,2007 Free Software Foundation, Inc.
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* Copyright (C) 2004,2007,2010 Free Software Foundation, Inc.
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*
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* GRUB is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define CACHE_LINE_BYTES 32
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.text
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.align 2
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.globl grub_arch_sync_caches
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grub_arch_sync_caches:
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/* `address' may not be CACHE_LINE_BYTES-aligned. */
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andi. 6, 3, CACHE_LINE_BYTES - 1 /* Find the misalignment. */
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add 4, 4, 6 /* Adjust `size' to compensate. */
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/* Force the dcache lines to memory. */
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li 5, 0
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1: dcbst 5, 3
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addi 5, 5, CACHE_LINE_BYTES
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cmpw 5, 4
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blt 1b
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sync /* Force all dcbsts to complete. */
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/* Invalidate the icache lines. */
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li 5, 0
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1: icbi 5, 3
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addi 5, 5, CACHE_LINE_BYTES
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cmpw 5, 4
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blt 1b
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sync /* Force all icbis to complete. */
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isync /* Discard partially executed instructions that were
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loaded from the invalid icache. */
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#include "cache_flush.S"
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blr
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43
kern/powerpc/cache_flush.S
Normal file
43
kern/powerpc/cache_flush.S
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@ -0,0 +1,43 @@
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/* cache.S - Flush the processor cache for a specific region. */
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/*
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* GRUB -- GRand Unified Bootloader
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* Copyright (C) 2004,2007,2010 Free Software Foundation, Inc.
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*
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* GRUB is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GRUB is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
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*/
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#undef CACHE_LINE_BYTES
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#define CACHE_LINE_BYTES 32
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/* `address' may not be CACHE_LINE_BYTES-aligned. */
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andi. 6, 3, CACHE_LINE_BYTES - 1 /* Find the misalignment. */
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add 4, 4, 6 /* Adjust `size' to compensate. */
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/* Force the dcache lines to memory. */
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li 5, 0
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1: dcbst 5, 3
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addi 5, 5, CACHE_LINE_BYTES
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cmpw 5, 4
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blt 1b
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sync /* Force all dcbsts to complete. */
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/* Invalidate the icache lines. */
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li 5, 0
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1: icbi 5, 3
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addi 5, 5, CACHE_LINE_BYTES
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cmpw 5, 4
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blt 1b
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sync /* Force all icbis to complete. */
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isync /* Discard partially executed instructions that were
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loaded from the invalid icache. */
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