diff --git a/ChangeLog b/ChangeLog index 1f5efd32a..5d9d7a759 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,35 @@ +2010-08-11 Vladimir Serbinenko + + Remove the dump of sm712 initialisation sequence. + + * include/grub/pci.h (GRUB_PCI_CLASS_SUBCLASS_VGA): New const. + * include/grub/vga.h (GRUB_VGA_IO_ARX_READ): New register. + (GRUB_VGA_IO_MISC_WRITE): Likewise. + (GRUB_VGA_CR_*): Added many registers. + (GRUB_VGA_SR_*): Likewise. + (GRUB_VGA_GR_*): Likewise. + (grub_vga_write_arx): New function. + (grub_video_hw_config): New struct. + (grub_vga_set_geometry): New function. + * kern/i386/qemu/init.c (load_palette): Use grub_vga_write_arx and + GRUB_PCI_CLASS_SUBCLASS_VGA. + * video/cirrus.c (grub_video_cirrus_setup): Use grub_vga_set_geometry. + * video/sm712.c (grub_sm712_write_reg): New function + (grub_sm712_read_reg): Likewise. + (grub_sm712_sr_write): Likewise. + (grub_sm712_gr_write): Likewise. + (grub_sm712_cr_write): Likewise. + (grub_sm712_write_arx): Likewise. + (grub_sm712_cr_shadow_write): Likewise. + (grub_sm712_write_dda_lookup): Likewise. + (grub_video_sm712_setup): Initialise the video rather then + blindly replay the dump. + (main) [TEST]: Add a routine to be able to compile as standalone for + tests. + * video/sm712_init.c (sm712_init): Removed. + (sm712_sr_seq1): New array. + (sm712_sr_seq2): Likewise. + 2010-08-10 Vladimir Serbinenko * include/grub/vga.h: Add missing grub/pci.h include. diff --git a/include/grub/pci.h b/include/grub/pci.h index e6d6488f0..f34e3d907 100644 --- a/include/grub/pci.h +++ b/include/grub/pci.h @@ -80,6 +80,7 @@ #define GRUB_PCI_STATUS_DEVSEL_TIMING_SHIFT 9 #define GRUB_PCI_STATUS_DEVSEL_TIMING_MASK 0x0600 +#define GRUB_PCI_CLASS_SUBCLASS_VGA 0x0300 #ifndef ASM_FILE typedef grub_uint32_t grub_pci_id_t; diff --git a/include/grub/vga.h b/include/grub/vga.h index 5f321d589..7f112d83a 100644 --- a/include/grub/vga.h +++ b/include/grub/vga.h @@ -24,6 +24,8 @@ enum { GRUB_VGA_IO_ARX = 0x3c0, + GRUB_VGA_IO_ARX_READ = 0x3c1, + GRUB_VGA_IO_MISC_WRITE = 0x3c2, GRUB_VGA_IO_SR_INDEX = 0x3c4, GRUB_VGA_IO_SR_DATA = 0x3c5, GRUB_VGA_IO_PIXEL_MASK = 0x3c6, @@ -41,8 +43,15 @@ enum enum { - GRUB_VGA_CR_WIDTH = 0x01, + GRUB_VGA_CR_HTOTAL = 0x00, + GRUB_VGA_CR_HORIZ_END = 0x01, + GRUB_VGA_CR_HBLANK_START = 0x02, + GRUB_VGA_CR_HBLANK_END = 0x03, + GRUB_VGA_CR_HORIZ_SYNC_PULSE_START = 0x04, + GRUB_VGA_CR_HORIZ_SYNC_PULSE_END = 0x05, + GRUB_VGA_CR_VERT_TOTAL = 0x06, GRUB_VGA_CR_OVERFLOW = 0x07, + GRUB_VGA_CR_BYTE_PANNING = 0x08, GRUB_VGA_CR_CELL_HEIGHT = 0x09, GRUB_VGA_CR_CURSOR_START = 0x0a, GRUB_VGA_CR_CURSOR_END = 0x0b, @@ -50,14 +59,71 @@ enum GRUB_VGA_CR_START_ADDR_LOW_REGISTER = 0x0d, GRUB_VGA_CR_CURSOR_ADDR_HIGH = 0x0e, GRUB_VGA_CR_CURSOR_ADDR_LOW = 0x0f, + GRUB_VGA_CR_VSYNC_START = 0x10, GRUB_VGA_CR_VSYNC_END = 0x11, - GRUB_VGA_CR_HEIGHT = 0x12, + GRUB_VGA_CR_VDISPLAY_END = 0x12, GRUB_VGA_CR_PITCH = 0x13, + GRUB_VGA_CR_UNDERLINE_LOCATION = 0x14, + GRUB_VGA_CR_VERTICAL_BLANK_START = 0x15, + GRUB_VGA_CR_VERTICAL_BLANK_END = 0x16, GRUB_VGA_CR_MODE = 0x17, GRUB_VGA_CR_LINE_COMPARE = 0x18, }; +enum + { + GRUB_VGA_CR_BYTE_PANNING_NORMAL = 0 + }; + +enum + { + GRUB_VGA_CR_UNDERLINE_LOCATION_DWORD_MODE = 0x40 + }; + +enum + { + GRUB_VGA_IO_MISC_COLOR = 0x01, + GRUB_VGA_IO_MISC_ENABLE_VRAM_ACCESS = 0x02, + GRUB_VGA_IO_MISC_EXTERNAL_CLOCK_0 = 0x08, + GRUB_VGA_IO_MISC_28MHZ = 0x04, + GRUB_VGA_IO_MISC_UPPER_64K = 0x20, + GRUB_VGA_IO_MISC_NEGATIVE_HORIZ_POLARITY = 0x40, + GRUB_VGA_IO_MISC_NEGATIVE_VERT_POLARITY = 0x80, + }; + +enum + { + GRUB_VGA_ARX_MODE = 0x10, + GRUB_VGA_ARX_OVERSCAN = 0x11, + GRUB_VGA_ARX_COLOR_PLANE_ENABLE = 0x12, + GRUB_VGA_ARX_HORIZONTAL_PANNING = 0x13, + GRUB_VGA_ARX_COLOR_SELECT = 0x14 + }; + +enum + { + GRUB_VGA_ARX_MODE_TEXT = 0x00, + GRUB_VGA_ARX_MODE_GRAPHICS = 0x01, + GRUB_VGA_ARX_MODE_ENABLE_256COLOR = 0x40 + }; + #define GRUB_VGA_CR_WIDTH_DIVISOR 8 + +#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT 7 +#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK 0x02 +#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT 3 +#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK 0x40 + +#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT 8 +#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK 0x01 +#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT 4 +#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK 0x20 + +#define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT 6 +#define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK 0x04 +#define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT 2 +#define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK 0x80 + #define GRUB_VGA_CR_OVERFLOW_HEIGHT1_SHIFT 7 #define GRUB_VGA_CR_OVERFLOW_HEIGHT1_MASK 0x02 #define GRUB_VGA_CR_OVERFLOW_HEIGHT2_SHIFT 3 @@ -67,7 +133,9 @@ enum #define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK 0x40 #define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT 3 - +#define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK 0x20 +#define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT 4 +#define GRUB_VGA_CR_CELL_HEIGHT_DOUBLE_SCAN 0x80 enum { GRUB_VGA_CR_CURSOR_START_DISABLE = (1 << 5) @@ -79,17 +147,26 @@ enum { GRUB_VGA_CR_MODE_NO_CGA = 0x01, GRUB_VGA_CR_MODE_NO_HERCULES = 0x02, + GRUB_VGA_CR_MODE_ADDRESS_WRAP = 0x20, GRUB_VGA_CR_MODE_BYTE_MODE = 0x40, GRUB_VGA_CR_MODE_TIMING_ENABLE = 0x80 }; enum { + GRUB_VGA_SR_RESET = 0, GRUB_VGA_SR_CLOCKING_MODE = 1, GRUB_VGA_SR_MAP_MASK_REGISTER = 2, + GRUB_VGA_SR_CHAR_MAP_SELECT = 3, GRUB_VGA_SR_MEMORY_MODE = 4, }; +enum + { + GRUB_VGA_SR_RESET_ASYNC = 1, + GRUB_VGA_SR_RESET_SYNC = 2 + }; + enum { GRUB_VGA_SR_CLOCKING_MODE_8_DOT_CLOCK = 1 @@ -98,19 +175,33 @@ enum enum { GRUB_VGA_SR_MEMORY_MODE_NORMAL = 0, - GRUB_VGA_SR_MEMORY_MODE_CHAIN4 = 8 + GRUB_VGA_SR_MEMORY_MODE_EXTERNAL_VIDEO_MEMORY = 2, + GRUB_VGA_SR_MEMORY_MODE_SEQUENTIAL_ADDRESSING = 4, + GRUB_VGA_SR_MEMORY_MODE_CHAIN4 = 8, }; enum { + GRUB_VGA_GR_SET_RESET_PLANE = 0, + GRUB_VGA_GR_SET_RESET_PLANE_ENABLE = 1, + GRUB_VGA_GR_COLOR_COMPARE = 2, GRUB_VGA_GR_DATA_ROTATE = 3, GRUB_VGA_GR_READ_MAP_REGISTER = 4, GRUB_VGA_GR_MODE = 5, GRUB_VGA_GR_GR6 = 6, + GRUB_VGA_GR_COLOR_COMPARE_DISABLE = 7, GRUB_VGA_GR_BITMASK = 8, GRUB_VGA_GR_MAX }; +#define GRUB_VGA_ALL_PLANES 0xf +#define GRUB_VGA_NO_PLANES 0x0 + +enum + { + GRUB_VGA_GR_DATA_ROTATE_NOP = 0 + }; + enum { GRUB_VGA_TEXT_TEXT_PLANE = 0, @@ -121,6 +212,7 @@ enum enum { GRUB_VGA_GR_GR6_GRAPHICS_MODE = 1, + GRUB_VGA_GR_GR6_MMAP_A0 = (1 << 2), GRUB_VGA_GR_GR6_MMAP_CGA = (3 << 2) }; @@ -128,6 +220,7 @@ enum { GRUB_VGA_GR_MODE_READ_MODE1 = 0x08, GRUB_VGA_GR_MODE_ODD_EVEN = 0x10, + GRUB_VGA_GR_MODE_ODD_EVEN_SHIFT = 0x20, GRUB_VGA_GR_MODE_256_COLOR = 0x40 }; @@ -193,4 +286,86 @@ grub_vga_palette_write (grub_uint8_t addr, grub_uint8_t r, grub_uint8_t g, grub_outb (b, GRUB_MACHINE_PCI_IO_BASE + GRUB_VGA_IO_PALLETTE_DATA); } +static inline void +grub_vga_write_arx (grub_uint8_t val, grub_uint8_t addr) +{ + grub_inb (GRUB_MACHINE_PCI_IO_BASE + GRUB_VGA_IO_INPUT_STATUS1_REGISTER); + grub_outb (addr, GRUB_MACHINE_PCI_IO_BASE + GRUB_VGA_IO_ARX); + grub_inb (GRUB_MACHINE_PCI_IO_BASE + GRUB_VGA_IO_ARX_READ); + grub_outb (val, GRUB_MACHINE_PCI_IO_BASE + GRUB_VGA_IO_ARX); +} + +struct grub_video_hw_config +{ + unsigned vertical_total; + unsigned vertical_blank_start; + unsigned vertical_blank_end; + unsigned vertical_sync_start; + unsigned vertical_sync_end; + unsigned line_compare; + unsigned vdisplay_end; + unsigned pitch; + unsigned horizontal_total; + unsigned horizontal_blank_start; + unsigned horizontal_blank_end; + unsigned horizontal_sync_pulse_start; + unsigned horizontal_sync_pulse_end; + unsigned horizontal_end; +}; + +static inline void +grub_vga_set_geometry (struct grub_video_hw_config *config, + void (*cr_write) (grub_uint8_t val, grub_uint8_t addr)) +{ + unsigned vertical_total = config->vertical_total - 2; + unsigned vertical_blank_start = config->vertical_blank_start - 1; + unsigned vdisplay_end = config->vdisplay_end - 1; + grub_uint8_t overflow, cell_height_reg; + + /* Disable CR0-7 write protection. */ + cr_write (0, GRUB_VGA_CR_VSYNC_END); + + overflow = ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK) + | ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK) + | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK) + | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK) + | ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK) + | ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK) + | ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT) + & GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK) + | ((config->line_compare >> GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT) + & GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK); + + cell_height_reg = ((vertical_blank_start + >> GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT) + & GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK) + | ((config->line_compare >> GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT) + & GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK); + + cr_write (config->horizontal_total - 1, GRUB_VGA_CR_HTOTAL); + cr_write (config->horizontal_end - 1, GRUB_VGA_CR_HORIZ_END); + cr_write (config->horizontal_blank_start - 1, GRUB_VGA_CR_HBLANK_START); + cr_write (config->horizontal_blank_end, GRUB_VGA_CR_HBLANK_END); + cr_write (config->horizontal_sync_pulse_start, + GRUB_VGA_CR_HORIZ_SYNC_PULSE_START); + cr_write (config->horizontal_sync_pulse_end, + GRUB_VGA_CR_HORIZ_SYNC_PULSE_END); + cr_write (vertical_total & 0xff, GRUB_VGA_CR_VERT_TOTAL); + cr_write (overflow, GRUB_VGA_CR_OVERFLOW); + cr_write (cell_height_reg, GRUB_VGA_CR_CELL_HEIGHT); + cr_write (config->vertical_sync_start & 0xff, GRUB_VGA_CR_VSYNC_START); + cr_write (config->vertical_sync_end & 0x0f, GRUB_VGA_CR_VSYNC_END); + cr_write (vdisplay_end & 0xff, GRUB_VGA_CR_VDISPLAY_END); + cr_write (config->pitch & 0xff, GRUB_VGA_CR_PITCH); + cr_write (vertical_blank_start & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_START); + cr_write (config->vertical_blank_end & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_END); + cr_write (config->line_compare & 0xff, GRUB_VGA_CR_LINE_COMPARE); +} + #endif diff --git a/kern/i386/qemu/init.c b/kern/i386/qemu/init.c index 201ba3633..bd12953df 100644 --- a/kern/i386/qemu/init.c +++ b/kern/i386/qemu/init.c @@ -69,10 +69,7 @@ load_palette (void) { unsigned i; for (i = 0; i < 16; i++) - { - grub_outb (i, GRUB_VGA_IO_ARX); - grub_outb (i, GRUB_VGA_IO_ARX); - } + grub_vga_write_arx (i, i); for (i = 0; i < ARRAY_SIZE (colors); i++) grub_vga_palette_write (i, colors[i].r, colors[i].g, colors[i].b); @@ -90,7 +87,7 @@ grub_qemu_init_cirrus (void) addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS); class = grub_pci_read (addr); - if (((class >> 16) & 0xffff) != 0x0300) + if (((class >> 16) & 0xffff) != GRUB_PCI_CLASS_SUBCLASS_VGA) return 0; /* FIXME: chooose addresses dynamically. */ @@ -110,7 +107,7 @@ grub_qemu_init_cirrus (void) grub_pci_iterate (find_card); - grub_outb (1, 0x3c2); + grub_outb (GRUB_VGA_IO_MISC_COLOR, GRUB_VGA_IO_MISC_WRITE); load_font (); @@ -137,10 +134,8 @@ grub_qemu_init_cirrus (void) load_palette (); - grub_outb (0x10, 0x3c0); - grub_outb (0, 0x3c1); - grub_outb (0x14, 0x3c0); - grub_outb (0, 0x3c1); + grub_vga_write_arx (GRUB_VGA_ARX_MODE_TEXT, GRUB_VGA_ARX_MODE); + grub_vga_write_arx (0, GRUB_VGA_ARX_COLOR_SELECT); grub_vga_sr_write (GRUB_VGA_SR_CLOCKING_MODE_8_DOT_CLOCK, GRUB_VGA_SR_CLOCKING_MODE); diff --git a/video/cirrus.c b/video/cirrus.c index ccbab9d15..b8b0142ad 100644 --- a/video/cirrus.c +++ b/video/cirrus.c @@ -334,43 +334,26 @@ grub_video_cirrus_setup (unsigned int width, unsigned int height, } { - int pitch_reg, overflow_reg = 0, line_compare = 0x3ff; + struct grub_video_hw_config config = { + .pitch = pitch / GRUB_VGA_CR_PITCH_DIVISOR, + .line_compare = 0x3ff, + .vdisplay_end = height - 1, + .horizontal_end = width / GRUB_VGA_CR_WIDTH_DIVISOR + }; grub_uint8_t sr_ext = 0, hidden_dac = 0; - pitch_reg = pitch / GRUB_VGA_CR_PITCH_DIVISOR; - + grub_vga_set_geometry (&config, grub_vga_cr_write); + grub_vga_gr_write (GRUB_VGA_GR_MODE_256_COLOR | GRUB_VGA_GR_MODE_READ_MODE1, GRUB_VGA_GR_MODE); grub_vga_gr_write (GRUB_VGA_GR_GR6_GRAPHICS_MODE, GRUB_VGA_GR_GR6); grub_vga_sr_write (GRUB_VGA_SR_MEMORY_MODE_NORMAL, GRUB_VGA_SR_MEMORY_MODE); - /* Disable CR0-7 write protection. */ - grub_vga_cr_write (0, GRUB_VGA_CR_VSYNC_END); - - grub_vga_cr_write (width / GRUB_VGA_CR_WIDTH_DIVISOR - 1, - GRUB_VGA_CR_WIDTH); - grub_vga_cr_write ((height - 1) & 0xff, GRUB_VGA_CR_HEIGHT); - overflow_reg |= (((height - 1) >> GRUB_VGA_CR_OVERFLOW_HEIGHT1_SHIFT) & - GRUB_VGA_CR_OVERFLOW_HEIGHT1_MASK) - | (((height - 1) >> GRUB_VGA_CR_OVERFLOW_HEIGHT2_SHIFT) & - GRUB_VGA_CR_OVERFLOW_HEIGHT2_MASK); - - grub_vga_cr_write (pitch_reg & 0xff, GRUB_VGA_CR_PITCH); - - grub_vga_cr_write (line_compare & 0xff, GRUB_VGA_CR_LINE_COMPARE); - overflow_reg |= (line_compare >> GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT) - & GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK; - - grub_vga_cr_write (overflow_reg, GRUB_VGA_CR_OVERFLOW); - - grub_vga_cr_write ((pitch_reg >> CIRRUS_CR_EXTENDED_DISPLAY_PITCH_SHIFT) + grub_vga_cr_write ((config.pitch >> CIRRUS_CR_EXTENDED_DISPLAY_PITCH_SHIFT) & CIRRUS_CR_EXTENDED_DISPLAY_PITCH_MASK, CIRRUS_CR_EXTENDED_DISPLAY); - grub_vga_cr_write ((line_compare >> GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT) - & GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK, GRUB_VGA_CR_CELL_HEIGHT); - grub_vga_cr_write (GRUB_VGA_CR_MODE_TIMING_ENABLE | GRUB_VGA_CR_MODE_BYTE_MODE | GRUB_VGA_CR_MODE_NO_HERCULES | GRUB_VGA_CR_MODE_NO_CGA, diff --git a/video/sm712.c b/video/sm712.c index db7494a62..60f2c9089 100644 --- a/video/sm712.c +++ b/video/sm712.c @@ -32,6 +32,162 @@ #define GRUB_SM712_TOTAL_MEMORY_SPACE 0x700400 #define GRUB_SM712_REG_BASE 0x700000 +#define GRUB_SM712_PCIID 0x0712126f + +enum + { + GRUB_SM712_SR_TV_CONTROL = 0x65, + GRUB_SM712_SR_RAM_LUT = 0x66, + GRUB_SM712_SR_CLOCK_CONTROL1 = 0x68, + GRUB_SM712_SR_CLOCK_CONTROL2 = 0x69, + GRUB_SM712_SR_VCLK_NUM = 0x6c, + GRUB_SM712_SR_VCLK_DENOM = 0x6d, + GRUB_SM712_SR_VCLK2_NUM = 0x6e, + GRUB_SM712_SR_VCLK2_DENOM = 0x6f, + GRUB_SM712_SR_POPUP_ICON_LOW = 0x80, + GRUB_SM712_SR_POPUP_ICON_HIGH = 0x81, + GRUB_SM712_SR_POPUP_ICON_CTRL = 0x82, + GRUB_SM712_SR_POPUP_ICON_COLOR1 = 0x84, + GRUB_SM712_SR_POPUP_ICON_COLOR2 = 0x85, + GRUB_SM712_SR_POPUP_ICON_COLOR3 = 0x86, + + GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_X_LOW = 0x88, + GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_X_HIGH = 0x89, + GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_Y_LOW = 0x8a, + GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_Y_HIGH = 0x8b, + GRUB_SM712_SR_HW_CURSOR_FG_COLOR = 0x8c, + GRUB_SM712_SR_HW_CURSOR_BG_COLOR = 0x8d, + + GRUB_SM712_SR_POPUP_ICON_X_LOW = 0x90, + GRUB_SM712_SR_POPUP_ICON_X_HIGH = 0x91, + GRUB_SM712_SR_POPUP_ICON_Y_LOW = 0x92, + GRUB_SM712_SR_POPUP_ICON_Y_HIGH = 0x93, + GRUB_SM712_SR_PANEL_HW_VIDEO_CONTROL = 0xa0, + GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_LOW = 0xa1, + GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_HIGH = 0xa2, + GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_MASK_LOW = 0xa3, + GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_MASK_HIGH = 0xa4, + GRUB_SM712_SR_PANEL_HW_VIDEO_RED_CONSTANT = 0xa5, + GRUB_SM712_SR_PANEL_HW_VIDEO_GREEN_CONSTANT = 0xa6, + GRUB_SM712_SR_PANEL_HW_VIDEO_BLUE_CONSTANT = 0xa7, + GRUB_SM712_SR_PANEL_HW_VIDEO_TOP_BOUNDARY = 0xa8, + GRUB_SM712_SR_PANEL_HW_VIDEO_LEFT_BOUNDARY = 0xa9, + GRUB_SM712_SR_PANEL_HW_VIDEO_BOTTOM_BOUNDARY = 0xaa, + GRUB_SM712_SR_PANEL_HW_VIDEO_RIGHT_BOUNDARY = 0xab, + GRUB_SM712_SR_PANEL_HW_VIDEO_TOP_LEFT_OVERFLOW_BOUNDARY = 0xac, + GRUB_SM712_SR_PANEL_HW_VIDEO_BOTTOM_RIGHT_OVERFLOW_BOUNDARY = 0xad, + GRUB_SM712_SR_PANEL_HW_VIDEO_VERTICAL_STRETCH_FACTOR = 0xae, + GRUB_SM712_SR_PANEL_HW_VIDEO_HORIZONTAL_STRETCH_FACTOR = 0xaf, + }; +enum + { + GRUB_SM712_SR_TV_CRT_SRAM = 0x00, + GRUB_SM712_SR_TV_LCD_SRAM = 0x08 + }; +enum + { + GRUB_SM712_SR_TV_ALT_CLOCK = 0x00, + GRUB_SM712_SR_TV_FREE_RUN_CLOCK = 0x04 + }; +enum + { + GRUB_SM712_SR_TV_CLOCK_CKIN_NTSC = 0x00, + GRUB_SM712_SR_TV_CLOCK_REFCLK_PAL = 0x04 + }; +enum + { + GRUB_SM712_SR_TV_HSYNC = 0x00, + GRUB_SM712_SR_TV_COMPOSITE_HSYNC = 0x01 + }; +enum + { + GRUB_SM712_SR_RAM_LUT_NORMAL = 0, + GRUB_SM712_SR_RAM_LUT_LCD_RAM_OFF = 0x80, + GRUB_SM712_SR_RAM_LUT_CRT_RAM_OFF = 0x40, + GRUB_SM712_SR_RAM_LUT_LCD_RAM_NO_WRITE = 0x20, + GRUB_SM712_SR_RAM_LUT_CRT_RAM_NO_WRITE = 0x10, + GRUB_SM712_SR_RAM_LUT_CRT_8BIT = 0x08, + GRUB_SM712_SR_RAM_LUT_CRT_GAMMA = 0x04 + }; + +enum + { + GRUB_SM712_SR_CLOCK_CONTROL1_VCLK_FROM_CCR = 0x40, + GRUB_SM712_SR_CLOCK_CONTROL1_8DOT_CLOCK = 0x10, + }; + +enum + { + GRUB_SM712_SR_CLOCK_CONTROL2_PROGRAM_VCLOCK = 0x03 + }; + +#define GRUB_SM712_SR_POPUP_ICON_HIGH_MASK 0x7 +#define GRUB_SM712_SR_POPUP_ICON_HIGH_HW_CURSOR_EN 0x80 + enum + { + GRUB_SM712_SR_POPUP_ICON_CTRL_DISABLED = 0, + GRUB_SM712_SR_POPUP_ICON_CTRL_ZOOM_ENABLED = 0x40, + GRUB_SM712_SR_POPUP_ICON_CTRL_ENABLED = 0x80 + }; +#define RGB332_BLACK 0 +#define RGB332_WHITE 0xff + + enum + { + GRUB_SM712_CR_OVERFLOW_INTERLACE = 0x30, + GRUB_SM712_CR_INTERLACE_RETRACE = 0x31, + GRUB_SM712_CR_TV_VDISPLAY_START = 0x32, + GRUB_SM712_CR_TV_VDISPLAY_END_HIGH = 0x33, + GRUB_SM712_CR_TV_VDISPLAY_END_LOW = 0x34, + GRUB_SM712_CR_DDA_CONTROL_LOW = 0x35, + GRUB_SM712_CR_DDA_CONTROL_HIGH = 0x36, + GRUB_SM712_CR_TV_EQUALIZER = 0x38, + GRUB_SM712_CR_TV_SERRATION = 0x39, + GRUB_SM712_CR_HSYNC_CTRL = 0x3a, + GRUB_SM712_CR_DEBUG = 0x3c, + GRUB_SM712_CR_SHADOW_VGA_HTOTAL = 0x40, + GRUB_SM712_CR_SHADOW_VGA_HBLANK_START = 0x41, + GRUB_SM712_CR_SHADOW_VGA_HBLANK_END = 0x42, + GRUB_SM712_CR_SHADOW_VGA_HRETRACE_START = 0x43, + GRUB_SM712_CR_SHADOW_VGA_HRETRACE_END = 0x44, + GRUB_SM712_CR_SHADOW_VGA_VERTICAL_TOTAL = 0x45, + GRUB_SM712_CR_SHADOW_VGA_VBLANK_START = 0x46, + GRUB_SM712_CR_SHADOW_VGA_VBLANK_END = 0x47, + GRUB_SM712_CR_SHADOW_VGA_VRETRACE_START = 0x48, + GRUB_SM712_CR_SHADOW_VGA_VRETRACE_END = 0x49, + GRUB_SM712_CR_SHADOW_VGA_OVERFLOW = 0x4a, + GRUB_SM712_CR_SHADOW_VGA_CELL_HEIGHT = 0x4b, + GRUB_SM712_CR_SHADOW_VGA_HDISPLAY_END = 0x4c, + GRUB_SM712_CR_SHADOW_VGA_VDISPLAY_END = 0x4d, + GRUB_SM712_CR_DDA_LOOKUP_REG3_START = 0x90, + GRUB_SM712_CR_DDA_LOOKUP_REG2_START = 0x91, + GRUB_SM712_CR_DDA_LOOKUP_REG1_START = 0xa0, + GRUB_SM712_CR_VCENTERING_OFFSET = 0xa6, + GRUB_SM712_CR_HCENTERING_OFFSET = 0xa7, + }; + +#define GRUB_SM712_CR_DEBUG_NONE 0 + +#define SM712_DDA_REG3_COMPARE_SHIFT 2 +#define SM712_DDA_REG3_COMPARE_MASK 0xfc +#define SM712_DDA_REG3_DDA_SHIFT 8 +#define SM712_DDA_REG3_DDA_MASK 0x3 +#define SM712_DDA_REG2_DDA_MASK 0xff +#define SM712_DDA_REG2_VCENTER_MASK 0x3f + +static struct +{ + grub_uint8_t compare; + grub_uint16_t dda; + grub_uint8_t vcentering; +} dda_lookups[] = { + { 21, 469, 2}, + { 23, 477, 2}, + { 33, 535, 2}, + { 35, 682, 21}, + { 34, 675, 2}, + { 55, 683, 6}, +}; static struct { @@ -44,6 +200,7 @@ static struct grub_pci_device_t dev; } framebuffer; +#ifndef TEST static grub_err_t grub_video_sm712_video_init (void) { @@ -62,14 +219,117 @@ grub_video_sm712_video_fini (void) return grub_video_fb_fini (); } +#endif + +static inline void +grub_sm712_write_reg (grub_uint8_t val, grub_uint16_t addr) +{ +#ifdef TEST + printf (" {1, 0x%x, 0x%x},\n", addr, val); +#else + *(volatile grub_uint8_t *) (framebuffer.ptr + GRUB_SM712_REG_BASE + + addr) = val; +#endif +} + +static inline grub_uint8_t +grub_sm712_read_reg (grub_uint16_t addr) +{ +#ifdef TEST + printf (" {-1, 0x%x, 0x5},\n", addr); +#else + return *(volatile grub_uint8_t *) (framebuffer.ptr + GRUB_SM712_REG_BASE + + addr); +#endif +} static inline grub_uint8_t grub_sm712_sr_read (grub_uint8_t addr) { - *(volatile grub_uint8_t *) (framebuffer.ptr + GRUB_SM712_REG_BASE - + GRUB_VGA_IO_SR_INDEX) = addr; - return *(volatile grub_uint8_t *) (framebuffer.ptr + GRUB_SM712_REG_BASE - + GRUB_VGA_IO_SR_DATA); + grub_sm712_write_reg (addr, GRUB_VGA_IO_SR_INDEX); + return grub_sm712_read_reg (GRUB_VGA_IO_SR_DATA); +} + +static inline void +grub_sm712_sr_write (grub_uint8_t val, grub_uint8_t addr) +{ + grub_sm712_write_reg (addr, GRUB_VGA_IO_SR_INDEX); + grub_sm712_write_reg (val, GRUB_VGA_IO_SR_DATA); +} + +static inline void +grub_sm712_gr_write (grub_uint8_t val, grub_uint8_t addr) +{ + grub_sm712_write_reg (addr, GRUB_VGA_IO_GR_INDEX); + grub_sm712_write_reg (val, GRUB_VGA_IO_GR_DATA); +} + +static inline void +grub_sm712_cr_write (grub_uint8_t val, grub_uint8_t addr) +{ + grub_sm712_write_reg (addr, GRUB_VGA_IO_CR_INDEX); + grub_sm712_write_reg (val, GRUB_VGA_IO_CR_DATA); +} + +static inline void +grub_sm712_write_arx (grub_uint8_t val, grub_uint8_t addr) +{ + grub_sm712_read_reg (GRUB_VGA_IO_INPUT_STATUS1_REGISTER); + grub_sm712_write_reg (addr, GRUB_VGA_IO_ARX); + grub_sm712_read_reg (GRUB_VGA_IO_ARX_READ); + grub_sm712_write_reg (val, GRUB_VGA_IO_ARX); +} + +static inline void +grub_sm712_cr_shadow_write (grub_uint8_t val, grub_uint8_t addr) +{ + grub_uint8_t mapping[] = + { + [GRUB_VGA_CR_HTOTAL] = GRUB_SM712_CR_SHADOW_VGA_HTOTAL, + [GRUB_VGA_CR_HORIZ_END] = 0xff, + [GRUB_VGA_CR_HBLANK_START] = GRUB_SM712_CR_SHADOW_VGA_HBLANK_START, + [GRUB_VGA_CR_HBLANK_END] = GRUB_SM712_CR_SHADOW_VGA_HBLANK_END, + [GRUB_VGA_CR_HORIZ_SYNC_PULSE_START] = GRUB_SM712_CR_SHADOW_VGA_HRETRACE_START, + [GRUB_VGA_CR_HORIZ_SYNC_PULSE_END] = GRUB_SM712_CR_SHADOW_VGA_HRETRACE_END, + [GRUB_VGA_CR_VERT_TOTAL] = GRUB_SM712_CR_SHADOW_VGA_VERTICAL_TOTAL, + [GRUB_VGA_CR_OVERFLOW] = GRUB_SM712_CR_SHADOW_VGA_OVERFLOW, + [GRUB_VGA_CR_BYTE_PANNING] = 0xff, + [GRUB_VGA_CR_CELL_HEIGHT] = GRUB_SM712_CR_SHADOW_VGA_CELL_HEIGHT, + [GRUB_VGA_CR_CURSOR_START] = 0xff, + [GRUB_VGA_CR_CURSOR_END] = 0xff, + [GRUB_VGA_CR_START_ADDR_HIGH_REGISTER] = 0xff, + [GRUB_VGA_CR_START_ADDR_LOW_REGISTER] = 0xff, + [GRUB_VGA_CR_CURSOR_ADDR_HIGH] = 0xff, + [GRUB_VGA_CR_CURSOR_ADDR_LOW] = 0xff, + [GRUB_VGA_CR_VSYNC_START] = GRUB_SM712_CR_SHADOW_VGA_VRETRACE_START, + [GRUB_VGA_CR_VSYNC_END] = GRUB_SM712_CR_SHADOW_VGA_VRETRACE_END, + [GRUB_VGA_CR_VDISPLAY_END] = GRUB_SM712_CR_SHADOW_VGA_VDISPLAY_END, + [GRUB_VGA_CR_PITCH] = GRUB_SM712_CR_SHADOW_VGA_HDISPLAY_END, + [GRUB_VGA_CR_UNDERLINE_LOCATION] = 0xff, + + [GRUB_VGA_CR_VERTICAL_BLANK_START] = GRUB_SM712_CR_SHADOW_VGA_VBLANK_START, + [GRUB_VGA_CR_VERTICAL_BLANK_END] = GRUB_SM712_CR_SHADOW_VGA_VBLANK_END, + [GRUB_VGA_CR_MODE] = 0xff, + [GRUB_VGA_CR_LINE_COMPARE] = 0xff + }; + if (addr >= ARRAY_SIZE (mapping) || mapping[addr] == 0xff) + return; + grub_sm712_cr_write (val, mapping[addr]); +} + +static inline void +grub_sm712_write_dda_lookup (int idx, grub_uint8_t compare, grub_uint16_t dda, + grub_uint8_t vcentering) +{ + grub_sm712_cr_write (((compare << SM712_DDA_REG3_COMPARE_SHIFT) + & SM712_DDA_REG3_COMPARE_MASK) + | ((dda >> SM712_DDA_REG3_DDA_SHIFT) + & SM712_DDA_REG3_DDA_MASK), + GRUB_SM712_CR_DDA_LOOKUP_REG3_START + 2 * idx); + grub_sm712_cr_write (dda & SM712_DDA_REG2_DDA_MASK, + GRUB_SM712_CR_DDA_LOOKUP_REG2_START + 2 * idx); + grub_sm712_cr_write (vcentering & SM712_DDA_REG2_VCENTER_MASK, + GRUB_SM712_CR_DDA_LOOKUP_REG1_START + idx); } static grub_err_t @@ -81,6 +341,7 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, int found = 0; unsigned i; +#ifndef TEST auto int NESTED_FUNC_ATTR find_card (grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused))); int NESTED_FUNC_ATTR find_card (grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused))) { @@ -90,7 +351,8 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS); class = grub_pci_read (addr); - if (((class >> 16) & 0xffff) != 0x0300 || pciid != 0x0712126f) + if (((class >> 16) & 0xffff) != GRUB_PCI_CLASS_SUBCLASS_VGA + || pciid != GRUB_SM712_PCIID) return 0; found = 1; @@ -114,7 +376,7 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, grub_pci_iterate (find_card); if (!found) return grub_error (GRUB_ERR_IO, "Couldn't find graphics card"); - +#endif /* Fill mode info details. */ framebuffer.mode_info.width = 1024; framebuffer.mode_info.height = 600; @@ -131,8 +393,12 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, framebuffer.mode_info.blue_field_pos = 0; framebuffer.mode_info.reserved_mask_size = 0; framebuffer.mode_info.reserved_field_pos = 0; - framebuffer.mode_info.blit_format = grub_video_get_blit_format (&framebuffer.mode_info); +#ifndef TEST + framebuffer.mode_info.blit_format + = grub_video_get_blit_format (&framebuffer.mode_info); +#endif +#ifndef TEST if (found && framebuffer.base == 0) { grub_pci_address_t addr; @@ -150,47 +416,280 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, addr = grub_pci_make_address (framebuffer.dev, GRUB_PCI_REG_COMMAND); grub_pci_write (addr, 0x7); } +#endif /* We can safely discard volatile attribute. */ +#ifndef TEST framebuffer.ptr = (void *) grub_pci_device_map_range (framebuffer.dev, framebuffer.base, GRUB_SM712_TOTAL_MEMORY_SPACE); +#endif framebuffer.mapped = 1; /* Initialise SM712. */ +#ifndef TEST + /* FIXME */ grub_vga_sr_write (0x11, 0x18); +#endif +#ifndef TEST /* Prevent garbage from appearing on the screen. */ grub_memset (framebuffer.ptr, 0, framebuffer.mode_info.height * framebuffer.mode_info.pitch); +#endif - for (i = 0; i < ARRAY_SIZE (sm712_init); i++) - switch (sm712_init[i].directive) + /* FIXME */ + grub_sm712_sr_write (0, 0x21); + grub_sm712_sr_write (0x7a, 0x62); + grub_sm712_sr_write (0x16, 0x6a); + grub_sm712_sr_write (0x2, 0x6b); + grub_sm712_write_reg (0, GRUB_VGA_IO_PIXEL_MASK); + grub_sm712_sr_write (GRUB_VGA_SR_RESET_ASYNC, GRUB_VGA_SR_RESET); + grub_sm712_write_reg (GRUB_VGA_IO_MISC_NEGATIVE_VERT_POLARITY + | GRUB_VGA_IO_MISC_NEGATIVE_HORIZ_POLARITY + | GRUB_VGA_IO_MISC_UPPER_64K + | GRUB_VGA_IO_MISC_EXTERNAL_CLOCK_0 + | GRUB_VGA_IO_MISC_ENABLE_VRAM_ACCESS + | GRUB_VGA_IO_MISC_COLOR, GRUB_VGA_IO_MISC_WRITE); + grub_sm712_sr_write (GRUB_VGA_SR_RESET_ASYNC | GRUB_VGA_SR_RESET_SYNC, + GRUB_VGA_SR_RESET); + grub_sm712_sr_write (GRUB_VGA_SR_CLOCKING_MODE_8_DOT_CLOCK, + GRUB_VGA_SR_CLOCKING_MODE); + grub_sm712_sr_write (GRUB_VGA_ALL_PLANES, GRUB_VGA_SR_MAP_MASK_REGISTER); + grub_sm712_sr_write (0, GRUB_VGA_SR_CHAR_MAP_SELECT); + grub_sm712_sr_write (GRUB_VGA_SR_MEMORY_MODE_CHAIN4 + | GRUB_VGA_SR_MEMORY_MODE_SEQUENTIAL_ADDRESSING + | GRUB_VGA_SR_MEMORY_MODE_EXTERNAL_VIDEO_MEMORY, + GRUB_VGA_SR_MEMORY_MODE); + + for (i = 0; i < ARRAY_SIZE (sm712_sr_seq1); i++) + grub_sm712_sr_write (sm712_sr_seq1[i], 0x10 + i); + + for (i = 0; i < ARRAY_SIZE (sm712_sr_seq2); i++) + grub_sm712_sr_write (sm712_sr_seq2[i], 0x30 + i); + + /* Undocumented. */ + grub_sm712_sr_write (0x1a, 0x63); + /* Undocumented. */ + grub_sm712_sr_write (0x1a, 0x64); + + grub_sm712_sr_write (GRUB_SM712_SR_TV_CRT_SRAM | GRUB_SM712_SR_TV_ALT_CLOCK + | GRUB_SM712_SR_TV_CLOCK_CKIN_NTSC + | GRUB_SM712_SR_TV_HSYNC, + GRUB_SM712_SR_TV_CONTROL); + + grub_sm712_sr_write (GRUB_SM712_SR_RAM_LUT_NORMAL, GRUB_SM712_SR_RAM_LUT); + + /* Undocumented. */ + grub_sm712_sr_write (0x00, 0x67); + + grub_sm712_sr_write (GRUB_SM712_SR_CLOCK_CONTROL1_VCLK_FROM_CCR + | GRUB_SM712_SR_CLOCK_CONTROL1_8DOT_CLOCK, + GRUB_SM712_SR_CLOCK_CONTROL1); + grub_sm712_sr_write (GRUB_SM712_SR_CLOCK_CONTROL2_PROGRAM_VCLOCK, + GRUB_SM712_SR_CLOCK_CONTROL2); + + grub_sm712_sr_write (82, GRUB_SM712_SR_VCLK_NUM); + grub_sm712_sr_write (137, GRUB_SM712_SR_VCLK_DENOM); + + grub_sm712_sr_write (9, GRUB_SM712_SR_VCLK2_NUM); + grub_sm712_sr_write (2, GRUB_SM712_SR_VCLK2_DENOM); + /* FIXME */ + grub_sm712_sr_write (0x04, 0x70); + /* FIXME */ + grub_sm712_sr_write (0x45, 0x71); + /* Undocumented */ + grub_sm712_sr_write (0x30, 0x72); + /* Undocumented */ + grub_sm712_sr_write (0x30, 0x73); + /* Undocumented */ + grub_sm712_sr_write (0x40, 0x74); + /* Undocumented */ + grub_sm712_sr_write (0x20, 0x75); + + grub_sm712_sr_write (0xff, GRUB_SM712_SR_POPUP_ICON_LOW); + grub_sm712_sr_write (GRUB_SM712_SR_POPUP_ICON_HIGH_MASK, + GRUB_SM712_SR_POPUP_ICON_HIGH); + grub_sm712_sr_write (GRUB_SM712_SR_POPUP_ICON_CTRL_DISABLED, + GRUB_SM712_SR_POPUP_ICON_CTRL); + /* Undocumented */ + grub_sm712_sr_write (0x0, 0x83); + + grub_sm712_sr_write (8, GRUB_SM712_SR_POPUP_ICON_COLOR1); + grub_sm712_sr_write (0, GRUB_SM712_SR_POPUP_ICON_COLOR2); + grub_sm712_sr_write (0x42, GRUB_SM712_SR_POPUP_ICON_COLOR3); + + /* Undocumented */ + grub_sm712_sr_write (0x3a, 0x87); + + /* Why theese coordinates? */ + grub_sm712_sr_write (0x59, GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_X_LOW); + grub_sm712_sr_write (0x02, GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_X_HIGH); + grub_sm712_sr_write (0x44, GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_Y_LOW); + grub_sm712_sr_write (0x02, GRUB_SM712_SR_HW_CURSOR_UPPER_LEFT_Y_HIGH); + + grub_sm712_sr_write (RGB332_BLACK, GRUB_SM712_SR_HW_CURSOR_FG_COLOR); + grub_sm712_sr_write (RGB332_WHITE, GRUB_SM712_SR_HW_CURSOR_BG_COLOR); + + /* Undocumented */ + grub_sm712_sr_write (0x3a, 0x8e); + grub_sm712_sr_write (0x3a, 0x8f); + + grub_sm712_sr_write (0, GRUB_SM712_SR_POPUP_ICON_X_LOW); + grub_sm712_sr_write (0, GRUB_SM712_SR_POPUP_ICON_X_HIGH); + grub_sm712_sr_write (0, GRUB_SM712_SR_POPUP_ICON_Y_LOW); + grub_sm712_sr_write (0, GRUB_SM712_SR_POPUP_ICON_Y_HIGH); + + grub_sm712_sr_write (0, GRUB_SM712_SR_PANEL_HW_VIDEO_CONTROL); + grub_sm712_sr_write (0x10, GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_LOW); + grub_sm712_sr_write (0x08, GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_HIGH); + grub_sm712_sr_write (0x00, GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_MASK_LOW); + grub_sm712_sr_write (0x02, GRUB_SM712_SR_PANEL_HW_VIDEO_COLOR_KEY_MASK_HIGH); + grub_sm712_sr_write (0xed, GRUB_SM712_SR_PANEL_HW_VIDEO_RED_CONSTANT); + grub_sm712_sr_write (0xed, GRUB_SM712_SR_PANEL_HW_VIDEO_GREEN_CONSTANT); + grub_sm712_sr_write (0xed, GRUB_SM712_SR_PANEL_HW_VIDEO_BLUE_CONSTANT); + + grub_sm712_sr_write (0x7b, GRUB_SM712_SR_PANEL_HW_VIDEO_TOP_BOUNDARY); + grub_sm712_sr_write (0xfb, GRUB_SM712_SR_PANEL_HW_VIDEO_LEFT_BOUNDARY); + grub_sm712_sr_write (0xff, GRUB_SM712_SR_PANEL_HW_VIDEO_BOTTOM_BOUNDARY); + grub_sm712_sr_write (0xff, GRUB_SM712_SR_PANEL_HW_VIDEO_RIGHT_BOUNDARY); + /* Doesn't match documentation? */ + grub_sm712_sr_write (0x97, GRUB_SM712_SR_PANEL_HW_VIDEO_TOP_LEFT_OVERFLOW_BOUNDARY); + grub_sm712_sr_write (0xef, GRUB_SM712_SR_PANEL_HW_VIDEO_BOTTOM_RIGHT_OVERFLOW_BOUNDARY); + + grub_sm712_sr_write (0xbf, GRUB_SM712_SR_PANEL_HW_VIDEO_VERTICAL_STRETCH_FACTOR); + grub_sm712_sr_write (0xdf, GRUB_SM712_SR_PANEL_HW_VIDEO_HORIZONTAL_STRETCH_FACTOR); + + grub_sm712_gr_write (GRUB_VGA_NO_PLANES, GRUB_VGA_GR_SET_RESET_PLANE); + grub_sm712_gr_write (GRUB_VGA_NO_PLANES, GRUB_VGA_GR_SET_RESET_PLANE_ENABLE); + grub_sm712_gr_write (GRUB_VGA_NO_PLANES, GRUB_VGA_GR_COLOR_COMPARE); + grub_sm712_gr_write (GRUB_VGA_GR_DATA_ROTATE_NOP, GRUB_VGA_GR_DATA_ROTATE); + grub_sm712_gr_write (GRUB_VGA_NO_PLANES, GRUB_VGA_GR_READ_MAP_REGISTER); + grub_sm712_gr_write (GRUB_VGA_GR_MODE_256_COLOR, GRUB_VGA_GR_MODE); + grub_sm712_gr_write (GRUB_VGA_GR_GR6_MMAP_A0 + | GRUB_VGA_GR_GR6_GRAPHICS_MODE, GRUB_VGA_GR_GR6); + grub_sm712_gr_write (GRUB_VGA_ALL_PLANES, GRUB_VGA_GR_COLOR_COMPARE_DISABLE); + grub_sm712_gr_write (0xff, GRUB_VGA_GR_BITMASK); + + /* Write palette mapping. */ + for (i = 0; i < 16; i++) + grub_sm712_write_arx (i, i); + + grub_sm712_write_arx (GRUB_VGA_ARX_MODE_ENABLE_256COLOR + | GRUB_VGA_ARX_MODE_GRAPHICS, GRUB_VGA_ARX_MODE); + grub_sm712_write_arx (0, GRUB_VGA_ARX_OVERSCAN); + grub_sm712_write_arx (GRUB_VGA_ALL_PLANES, GRUB_VGA_ARX_COLOR_PLANE_ENABLE); + grub_sm712_write_arx (0, GRUB_VGA_ARX_HORIZONTAL_PANNING); + grub_sm712_write_arx (0, GRUB_VGA_ARX_COLOR_SELECT); + + /* FIXME: compute this generically. */ + { + struct grub_video_hw_config config = { - case 1: - *(volatile grub_uint8_t *) ((char *) framebuffer.ptr - + GRUB_SM712_REG_BASE - + sm712_init[i].addr) = sm712_init[i].val; - break; - case -1: - { - grub_uint8_t val = *(volatile grub_uint8_t *) - ((char *) framebuffer.ptr + GRUB_SM712_REG_BASE - + sm712_init[i].addr); - (void) val; - } - break; - } + .vertical_total = 806, + .vertical_blank_start = 0x300, + .vertical_blank_end = 0, + .vertical_sync_start = 0x303, + .vertical_sync_end = 0x9, + .line_compare = 0x3ff, + .vdisplay_end = 0x300, + .pitch = 0x80, + .horizontal_total = 164, + .horizontal_end = 128, + .horizontal_blank_start = 128, + .horizontal_blank_end = 0, + .horizontal_sync_pulse_start = 133, + .horizontal_sync_pulse_end = 22 + }; + grub_vga_set_geometry (&config, grub_sm712_cr_write); + config.horizontal_sync_pulse_start = 134; + config.horizontal_sync_pulse_end = 21; + config.vertical_sync_start = 0x301; + config.vertical_sync_end = 0x0; + config.line_compare = 0x0ff; + config.vdisplay_end = 0x258; + config.pitch = 0x7f; + grub_vga_set_geometry (&config, grub_sm712_cr_shadow_write); + } + grub_sm712_cr_write (GRUB_VGA_CR_BYTE_PANNING_NORMAL, + GRUB_VGA_CR_BYTE_PANNING); + grub_sm712_cr_write (0, GRUB_VGA_CR_CURSOR_START); + grub_sm712_cr_write (0, GRUB_VGA_CR_CURSOR_END); + grub_sm712_cr_write (0, GRUB_VGA_CR_START_ADDR_HIGH_REGISTER); + grub_sm712_cr_write (0, GRUB_VGA_CR_START_ADDR_LOW_REGISTER); + grub_sm712_cr_write (0, GRUB_VGA_CR_CURSOR_ADDR_HIGH); + grub_sm712_cr_write (0, GRUB_VGA_CR_CURSOR_ADDR_LOW); + grub_sm712_cr_write (GRUB_VGA_CR_UNDERLINE_LOCATION_DWORD_MODE, + GRUB_VGA_CR_UNDERLINE_LOCATION); + grub_sm712_cr_write (GRUB_VGA_CR_MODE_ADDRESS_WRAP + | GRUB_VGA_CR_MODE_BYTE_MODE + | GRUB_VGA_CR_MODE_TIMING_ENABLE + | GRUB_VGA_CR_MODE_NO_CGA + | GRUB_VGA_CR_MODE_NO_HERCULES, + GRUB_VGA_CR_MODE); + + grub_sm712_cr_write (0, GRUB_SM712_CR_OVERFLOW_INTERLACE); + grub_sm712_cr_write (0, GRUB_SM712_CR_INTERLACE_RETRACE); + grub_sm712_cr_write (0, GRUB_SM712_CR_TV_VDISPLAY_START); + grub_sm712_cr_write (0, GRUB_SM712_CR_TV_VDISPLAY_END_HIGH); + grub_sm712_cr_write (0, GRUB_SM712_CR_TV_VDISPLAY_END_LOW); + grub_sm712_cr_write (0x80, GRUB_SM712_CR_DDA_CONTROL_LOW); + grub_sm712_cr_write (0x02, GRUB_SM712_CR_DDA_CONTROL_HIGH); + + /* Undocumented */ + grub_sm712_cr_write (0x20, 0x37); + + grub_sm712_cr_write (0, GRUB_SM712_CR_TV_EQUALIZER); + grub_sm712_cr_write (0, GRUB_SM712_CR_TV_SERRATION); + grub_sm712_cr_write (0, GRUB_SM712_CR_HSYNC_CTRL); + + /* Undocumented */ + grub_sm712_cr_write (0x40, 0x3b); + + grub_sm712_cr_write (GRUB_SM712_CR_DEBUG_NONE, GRUB_SM712_CR_DEBUG); + + /* Undocumented */ + grub_sm712_cr_write (0xff, 0x3d); + grub_sm712_cr_write (0x46, 0x3e); + grub_sm712_cr_write (0x91, 0x3f); + + for (i = 0; i < ARRAY_SIZE (dda_lookups); i++) + grub_sm712_write_dda_lookup (i, dda_lookups[i].compare, dda_lookups[i].dda, + dda_lookups[i].vcentering); + + /* Undocumented */ + grub_sm712_cr_write (0, 0x9c); + grub_sm712_cr_write (0, 0x9d); + grub_sm712_cr_write (0, 0x9e); + grub_sm712_cr_write (0, 0x9f); + + grub_sm712_cr_write (0, GRUB_SM712_CR_VCENTERING_OFFSET); + grub_sm712_cr_write (0, GRUB_SM712_CR_HCENTERING_OFFSET); + + grub_sm712_write_reg (GRUB_VGA_IO_MISC_NEGATIVE_HORIZ_POLARITY + | GRUB_VGA_IO_MISC_UPPER_64K + | GRUB_VGA_IO_MISC_28MHZ + | GRUB_VGA_IO_MISC_ENABLE_VRAM_ACCESS + | GRUB_VGA_IO_MISC_COLOR, + GRUB_VGA_IO_MISC_WRITE); + +#ifndef TEST + /* Undocumented? */ *(volatile grub_uint32_t *) ((char *) framebuffer.ptr + 0x40c00c) = 0; *(volatile grub_uint32_t *) ((char *) framebuffer.ptr + 0x40c040) = 0; *(volatile grub_uint32_t *) ((char *) framebuffer.ptr + 0x40c000) = 0x20000; *(volatile grub_uint32_t *) ((char *) framebuffer.ptr + 0x40c010) = 0x1020100; +#endif (void) grub_sm712_sr_read (0x16); - err = grub_video_fb_create_render_target_from_pointer (&framebuffer.render_target, &framebuffer.mode_info, framebuffer.ptr); +#ifndef TEST + err = grub_video_fb_create_render_target_from_pointer (&framebuffer + .render_target, + &framebuffer.mode_info, + framebuffer.ptr); if (err) return err; @@ -203,9 +702,12 @@ grub_video_sm712_setup (unsigned int width, unsigned int height, /* Copy default palette to initialize emulated palette. */ err = grub_video_fb_set_palette (0, GRUB_VIDEO_FBSTD_NUMCOLORS, grub_video_fbstd_colors); +#endif return err; } +#ifndef TEST + static grub_err_t grub_video_sm712_swap_buffers (void) { @@ -234,7 +736,6 @@ grub_video_sm712_get_info_and_fini (struct grub_video_mode_info *mode_info, return GRUB_ERR_NONE; } - static struct grub_video_adapter grub_video_sm712_adapter = { .name = "SM712 Video Driver", @@ -277,3 +778,10 @@ GRUB_MOD_FINI(video_sm712) { grub_video_unregister (&grub_video_sm712_adapter); } +#else +int +main () +{ + grub_video_sm712_setup (1024, 600, 0, 0); +} +#endif diff --git a/video/sm712_init.c b/video/sm712_init.c index 58dbbbbf9..cdb0b7383 100644 --- a/video/sm712_init.c +++ b/video/sm712_init.c @@ -1,540 +1,14 @@ /* Following sequence is a capture of sm712 initialisation sequence. */ -static struct -{ - int directive; - grub_uint32_t addr; - grub_uint32_t val; -} sm712_init[] = -{ - {1, 0x3c4, 0x21}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x62}, - {1, 0x3c5, 0x7a}, - {1, 0x3c4, 0x6a}, - {1, 0x3c5, 0x16}, - {1, 0x3c4, 0x6b}, - {1, 0x3c5, 0x2}, - {1, 0x3c6, 0x0}, - {1, 0x3c4, 0x0}, - {1, 0x3c5, 0x1}, - {1, 0x3c2, 0xeb}, - {1, 0x3c4, 0x0}, - {1, 0x3c5, 0x3}, - {1, 0x3c4, 0x1}, - {1, 0x3c5, 0x1}, - {1, 0x3c4, 0x2}, - {1, 0x3c5, 0xf}, - {1, 0x3c4, 0x3}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x4}, - {1, 0x3c5, 0xe}, - {1, 0x3c4, 0x10}, - {1, 0x3c5, 0xc8}, - {1, 0x3c4, 0x11}, - {1, 0x3c5, 0x40}, - {1, 0x3c4, 0x12}, - {1, 0x3c5, 0x14}, - {1, 0x3c4, 0x13}, - {1, 0x3c5, 0x60}, - {1, 0x3c4, 0x14}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x15}, - {1, 0x3c5, 0xa}, - {1, 0x3c4, 0x16}, - {1, 0x3c5, 0x92}, - {1, 0x3c4, 0x17}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x18}, - {1, 0x3c5, 0x51}, - {1, 0x3c4, 0x19}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x1a}, - {1, 0x3c5, 0x1}, - {1, 0x3c4, 0x1b}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x1c}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x1d}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x1e}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x1f}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x20}, - {1, 0x3c5, 0xc4}, - {1, 0x3c4, 0x21}, - {1, 0x3c5, 0x30}, - {1, 0x3c4, 0x22}, - {1, 0x3c5, 0x2}, - {1, 0x3c4, 0x23}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x24}, - {1, 0x3c5, 0x1}, - {1, 0x3c4, 0x30}, - {1, 0x3c5, 0x28}, - {1, 0x3c4, 0x31}, - {1, 0x3c5, 0x3}, - {1, 0x3c4, 0x32}, - {1, 0x3c5, 0x24}, - {1, 0x3c4, 0x33}, - {1, 0x3c5, 0x9}, - {1, 0x3c4, 0x34}, - {1, 0x3c5, 0xc0}, - {1, 0x3c4, 0x35}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x36}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x37}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x38}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x39}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x3a}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x3b}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x3c}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x3d}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x3e}, - {1, 0x3c5, 0x3}, - {1, 0x3c4, 0x3f}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0x40}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x41}, - {1, 0x3c5, 0xfc}, - {1, 0x3c4, 0x42}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x43}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x44}, - {1, 0x3c5, 0x20}, - {1, 0x3c4, 0x45}, - {1, 0x3c5, 0x18}, - {1, 0x3c4, 0x46}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x47}, - {1, 0x3c5, 0xfc}, - {1, 0x3c4, 0x48}, - {1, 0x3c5, 0x20}, - {1, 0x3c4, 0x49}, - {1, 0x3c5, 0xc}, - {1, 0x3c4, 0x4a}, - {1, 0x3c5, 0x44}, - {1, 0x3c4, 0x4b}, - {1, 0x3c5, 0x20}, - {1, 0x3c4, 0x4c}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x4d}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x4e}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x4f}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x50}, - {1, 0x3c5, 0x6}, - {1, 0x3c4, 0x51}, - {1, 0x3c5, 0x68}, - {1, 0x3c4, 0x52}, - {1, 0x3c5, 0xa7}, - {1, 0x3c4, 0x53}, - {1, 0x3c5, 0x7f}, - {1, 0x3c4, 0x54}, - {1, 0x3c5, 0x83}, - {1, 0x3c4, 0x55}, - {1, 0x3c5, 0x24}, - {1, 0x3c4, 0x56}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0x57}, - {1, 0x3c5, 0x3}, - {1, 0x3c4, 0x58}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x59}, - {1, 0x3c5, 0x60}, - {1, 0x3c4, 0x5a}, - {1, 0x3c5, 0x59}, - {1, 0x3c4, 0x5b}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x5c}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x5d}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x5e}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x5f}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x60}, - {1, 0x3c5, 0x1}, - {1, 0x3c4, 0x61}, - {1, 0x3c5, 0x80}, - {1, 0x3c4, 0x63}, - {1, 0x3c5, 0x1a}, - {1, 0x3c4, 0x64}, - {1, 0x3c5, 0x1a}, - {1, 0x3c4, 0x65}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x66}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x67}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x68}, - {1, 0x3c5, 0x50}, - {1, 0x3c4, 0x69}, - {1, 0x3c5, 0x3}, - {1, 0x3c4, 0x6c}, - {1, 0x3c5, 0x52}, - {1, 0x3c4, 0x6d}, - {1, 0x3c5, 0x89}, - {1, 0x3c4, 0x6e}, - {1, 0x3c5, 0x9}, - {1, 0x3c4, 0x6f}, - {1, 0x3c5, 0x2}, - {1, 0x3c4, 0x70}, - {1, 0x3c5, 0x4}, - {1, 0x3c4, 0x71}, - {1, 0x3c5, 0x45}, - {1, 0x3c4, 0x72}, - {1, 0x3c5, 0x30}, - {1, 0x3c4, 0x73}, - {1, 0x3c5, 0x30}, - {1, 0x3c4, 0x74}, - {1, 0x3c5, 0x40}, - {1, 0x3c4, 0x75}, - {1, 0x3c5, 0x20}, - {1, 0x3c4, 0x80}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0x81}, - {1, 0x3c5, 0x7}, - {1, 0x3c4, 0x82}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x83}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x84}, - {1, 0x3c5, 0x8}, - {1, 0x3c4, 0x85}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x86}, - {1, 0x3c5, 0x42}, - {1, 0x3c4, 0x87}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x88}, - {1, 0x3c5, 0x59}, - {1, 0x3c4, 0x89}, - {1, 0x3c5, 0x2}, - {1, 0x3c4, 0x8a}, - {1, 0x3c5, 0x44}, - {1, 0x3c4, 0x8b}, - {1, 0x3c5, 0x2}, - {1, 0x3c4, 0x8c}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x8d}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0x8e}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x8f}, - {1, 0x3c5, 0x3a}, - {1, 0x3c4, 0x90}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x91}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x92}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0x93}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0xa0}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0xa1}, - {1, 0x3c5, 0x10}, - {1, 0x3c4, 0xa2}, - {1, 0x3c5, 0x8}, - {1, 0x3c4, 0xa3}, - {1, 0x3c5, 0x0}, - {1, 0x3c4, 0xa4}, - {1, 0x3c5, 0x2}, - {1, 0x3c4, 0xa5}, - {1, 0x3c5, 0xed}, - {1, 0x3c4, 0xa6}, - {1, 0x3c5, 0xed}, - {1, 0x3c4, 0xa7}, - {1, 0x3c5, 0xed}, - {1, 0x3c4, 0xa8}, - {1, 0x3c5, 0x7b}, - {1, 0x3c4, 0xa9}, - {1, 0x3c5, 0xfb}, - {1, 0x3c4, 0xaa}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0xab}, - {1, 0x3c5, 0xff}, - {1, 0x3c4, 0xac}, - {1, 0x3c5, 0x97}, - {1, 0x3c4, 0xad}, - {1, 0x3c5, 0xef}, - {1, 0x3c4, 0xae}, - {1, 0x3c5, 0xbf}, - {1, 0x3c4, 0xaf}, - {1, 0x3c5, 0xdf}, - {1, 0x3ce, 0x0}, - {1, 0x3cf, 0x0}, - {1, 0x3ce, 0x1}, - {1, 0x3cf, 0x0}, - {1, 0x3ce, 0x2}, - {1, 0x3cf, 0x0}, - {1, 0x3ce, 0x3}, - {1, 0x3cf, 0x0}, - {1, 0x3ce, 0x4}, - {1, 0x3cf, 0x0}, - {1, 0x3ce, 0x5}, - {1, 0x3cf, 0x40}, - {1, 0x3ce, 0x6}, - {1, 0x3cf, 0x5}, - {1, 0x3ce, 0x7}, - {1, 0x3cf, 0xf}, - {1, 0x3ce, 0x8}, - {1, 0x3cf, 0xff}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x0}, - {-1, 0x3c1, 0x3e}, - {1, 0x3c0, 0x0}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x1}, - {-1, 0x3c1, 0x3b}, - {1, 0x3c0, 0x1}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x2}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0x2}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x3}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0x3}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x4}, - {-1, 0x3c1, 0x3b}, - {1, 0x3c0, 0x4}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x5}, - {-1, 0x3c1, 0x2f}, - {1, 0x3c0, 0x5}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x6}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0x6}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x7}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0x7}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x8}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0x8}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x9}, - {-1, 0x3c1, 0x3d}, - {1, 0x3c0, 0x9}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xa}, - {-1, 0x3c1, 0x1f}, - {1, 0x3c0, 0xa}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xb}, - {-1, 0x3c1, 0x1f}, - {1, 0x3c0, 0xb}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xc}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0xc}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xd}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0xd}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xe}, - {-1, 0x3c1, 0x3f}, - {1, 0x3c0, 0xe}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0xf}, - {-1, 0x3c1, 0x2e}, - {1, 0x3c0, 0xf}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x10}, - {-1, 0x3c1, 0x0}, - {1, 0x3c0, 0x41}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x11}, - {-1, 0x3c1, 0x0}, - {1, 0x3c0, 0x0}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x12}, - {-1, 0x3c1, 0x0}, - {1, 0x3c0, 0xf}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x13}, - {-1, 0x3c1, 0x0}, - {1, 0x3c0, 0x0}, - {-1, 0x3da, 0x5}, - {1, 0x3c0, 0x14}, - {-1, 0x3c1, 0x0}, - {1, 0x3c0, 0x0}, - {1, 0x3d4, 0x0}, - {1, 0x3d5, 0xa3}, - {1, 0x3d4, 0x1}, - {1, 0x3d5, 0x7f}, - {1, 0x3d4, 0x2}, - {1, 0x3d5, 0x7f}, - {1, 0x3d4, 0x3}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x4}, - {1, 0x3d5, 0x85}, - {1, 0x3d4, 0x5}, - {1, 0x3d5, 0x16}, - {1, 0x3d4, 0x6}, - {1, 0x3d5, 0x24}, - {1, 0x3d4, 0x7}, - {1, 0x3d5, 0xf5}, - {1, 0x3d4, 0x8}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x9}, - {1, 0x3d5, 0x60}, - {1, 0x3d4, 0xa}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xb}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xc}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xd}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xe}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xf}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x10}, - {1, 0x3d5, 0x3}, - {1, 0x3d4, 0x11}, - {1, 0x3d5, 0x9}, - {1, 0x3d4, 0x12}, - {1, 0x3d5, 0xff}, - {1, 0x3d4, 0x13}, - {1, 0x3d5, 0x80}, - {1, 0x3d4, 0x14}, - {1, 0x3d5, 0x40}, - {1, 0x3d4, 0x15}, - {1, 0x3d5, 0xff}, - {1, 0x3d4, 0x16}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x17}, - {1, 0x3d5, 0xe3}, - {1, 0x3d4, 0x18}, - {1, 0x3d5, 0xff}, - {1, 0x3d4, 0x30}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x31}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x32}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x33}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x34}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x35}, - {1, 0x3d5, 0x80}, - {1, 0x3d4, 0x36}, - {1, 0x3d5, 0x2}, - {1, 0x3d4, 0x37}, - {1, 0x3d5, 0x20}, - {1, 0x3d4, 0x38}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x39}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x3a}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x3b}, - {1, 0x3d5, 0x40}, - {1, 0x3d4, 0x3c}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x3d}, - {1, 0x3d5, 0xff}, - {1, 0x3d4, 0x3e}, - {1, 0x3d5, 0x46}, - {1, 0x3d4, 0x3f}, - {1, 0x3d5, 0x91}, - {1, 0x3d4, 0x40}, - {1, 0x3d5, 0xa3}, - {1, 0x3d4, 0x41}, - {1, 0x3d5, 0x7f}, - {1, 0x3d4, 0x42}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x43}, - {1, 0x3d5, 0x86}, - {1, 0x3d4, 0x44}, - {1, 0x3d5, 0x15}, - {1, 0x3d4, 0x45}, - {1, 0x3d5, 0x24}, - {1, 0x3d4, 0x46}, - {1, 0x3d5, 0xff}, - {1, 0x3d4, 0x47}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x48}, - {1, 0x3d5, 0x1}, - {1, 0x3d4, 0x49}, - {1, 0x3d5, 0x7}, - {1, 0x3d4, 0x4a}, - {1, 0x3d5, 0xe5}, - {1, 0x3d4, 0x4b}, - {1, 0x3d5, 0x20}, - {1, 0x3d4, 0x4c}, - {1, 0x3d5, 0x7f}, - {1, 0x3d4, 0x4d}, - {1, 0x3d5, 0x57}, - {1, 0x3d4, 0x90}, - {1, 0x3d5, 0x55}, - {1, 0x3d4, 0x91}, - {1, 0x3d5, 0xd5}, - {1, 0x3d4, 0x92}, - {1, 0x3d5, 0x5d}, - {1, 0x3d4, 0x93}, - {1, 0x3d5, 0xdd}, - {1, 0x3d4, 0x94}, - {1, 0x3d5, 0x86}, - {1, 0x3d4, 0x95}, - {1, 0x3d5, 0x17}, - {1, 0x3d4, 0x96}, - {1, 0x3d5, 0x8e}, - {1, 0x3d4, 0x97}, - {1, 0x3d5, 0xaa}, - {1, 0x3d4, 0x98}, - {1, 0x3d5, 0x8a}, - {1, 0x3d4, 0x99}, - {1, 0x3d5, 0xa3}, - {1, 0x3d4, 0x9a}, - {1, 0x3d5, 0xde}, - {1, 0x3d4, 0x9b}, - {1, 0x3d5, 0xab}, - {1, 0x3d4, 0x9c}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x9d}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x9e}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0x9f}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xa0}, - {1, 0x3d5, 0x2}, - {1, 0x3d4, 0xa1}, - {1, 0x3d5, 0x2}, - {1, 0x3d4, 0xa2}, - {1, 0x3d5, 0x2}, - {1, 0x3d4, 0xa3}, - {1, 0x3d5, 0x15}, - {1, 0x3d4, 0xa4}, - {1, 0x3d5, 0x2}, - {1, 0x3d4, 0xa5}, - {1, 0x3d5, 0x6}, - {1, 0x3d4, 0xa6}, - {1, 0x3d5, 0x0}, - {1, 0x3d4, 0xa7}, - {1, 0x3d5, 0x0}, - {1, 0x3c2, 0x67}, -}; +static grub_uint8_t sm712_sr_seq1[] = + { 0xc8, 0x40, 0x14, 0x60, 0x0, 0xa, 0x92, 0x0, + 0x51, 0x00, 0x01, 0x00, 0x0, 0x0, 0x00, 0x0, + 0xc4, 0x30, 0x02, 0x00, 0x1 }; + +static grub_uint8_t sm712_sr_seq2[] = + { 0x28, 0x03, 0x24, 0x09, 0xc0, 0x3a, 0x3a, 0x3a, + 0x3a, 0x3a, 0x3a, 0x3a, 0x00, 0x00, 0x03, 0xff, + 0x00, 0xfc, 0x00, 0x00, 0x20, 0x18, 0x00, 0xfc, + 0x20, 0x0c, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3a, + 0x06, 0x68, 0xa7, 0x7f, 0x83, 0x24, 0xff, 0x03, + 0x00, 0x60, 0x59, 0x3a, 0x3a, 0x00, 0x00, 0x3a, + 0x01, 0x80 };