193 lines
4 KiB
ArmAsm
193 lines
4 KiB
ArmAsm
/*
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* GRUB -- GRand Unified Bootloader
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* Copyright (C) 2009,2010 Free Software Foundation, Inc.
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*
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* GRUB is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GRUB is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* The code segment of the protected mode. */
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#define CODE_SEGMENT 0x08
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/* The data segment of the protected mode. */
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#define DATA_SEGMENT 0x10
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#define PSEUDO_REAL_CSEG 0x18
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#define PSEUDO_REAL_DSEG 0x20
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#include "relocator_common.S"
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.p2align 4 /* force 16-byte alignment */
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VARIABLE(grub_relocator16_start)
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PREAMBLE
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movl %esi, %eax
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movw %ax, (LOCAL (cs_base_bytes12) - LOCAL (base)) (RSI, 1)
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shrl $16, %eax
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movb %al, (LOCAL (cs_base_byte3) - LOCAL (base)) (RSI, 1)
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RELOAD_GDT
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.code32
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/* Update other registers. */
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movl $DATA_SEGMENT, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %fs
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movl %eax, %gs
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movl %eax, %ss
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DISABLE_PAGING
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#ifdef __x86_64__
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/* Disable amd64. */
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movl $GRUB_MEMORY_CPU_AMD64_MSR, %ecx
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rdmsr
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andl $(~GRUB_MEMORY_CPU_AMD64_MSR_ON), %eax
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wrmsr
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#endif
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/* Turn off PAE. */
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movl %cr4, %eax
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andl $(~GRUB_MEMORY_CPU_CR4_PAE_ON), %eax
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movl %eax, %cr4
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/* Update other registers. */
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movl $PSEUDO_REAL_DSEG, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %fs
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movl %eax, %gs
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movl %eax, %ss
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movl %esi, %eax
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shrl $4, %eax
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movw %ax, (LOCAL (segment) - LOCAL (base)) (%esi, 1)
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/* jump to a 16 bit segment */
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ljmp $PSEUDO_REAL_CSEG, $(LOCAL (cont2) - LOCAL(base))
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LOCAL(cont2):
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.code16
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/* clear the PE bit of CR0 */
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movl %cr0, %eax
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andl $(~GRUB_MEMORY_CPU_CR0_PE_ON), %eax
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movl %eax, %cr0
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/* flush prefetch queue, reload %cs */
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/* ljmp */
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.byte 0xea
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.word LOCAL(cont3)-LOCAL(base)
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LOCAL(segment):
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.word 0
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LOCAL(cont3):
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/* we are in real mode now
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* set up the real mode segment registers : DS, SS, ES
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*/
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_ds)
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.word 0
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movw %ax, %ds
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_es)
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.word 0
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movw %ax, %es
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_fs)
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.word 0
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movw %ax, %fs
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_gs)
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.word 0
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movw %ax, %gs
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_ss)
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.word 0
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movw %ax, %ss
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/* movw imm16, %ax. */
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.byte 0xb8
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VARIABLE(grub_relocator16_sp)
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.word 0
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movw %ax, %ss
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/* movw imm32, %edx. */
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.byte 0x66, 0xba
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VARIABLE(grub_relocator16_edx)
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.long 0
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/* Cleared direction flag is of no problem with any current
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payload and makes this implementation easier. */
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cld
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/* ljmp */
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.byte 0xea
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VARIABLE(grub_relocator16_ip)
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.word 0
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VARIABLE(grub_relocator16_cs)
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.word 0
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.code32
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/* GDT. Copied from loader/i386/linux.c. */
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.p2align 4
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LOCAL(gdt):
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.word 0, 0
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.byte 0, 0, 0, 0
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/* -- code segment --
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* base = 0x00000000, limit = 0xFFFFF (4 KiB Granularity), present
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* type = 32bit code execute/read, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x9A, 0xCF, 0
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/* -- data segment --
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* base = 0x00000000, limit 0xFFFFF (4 KiB Granularity), present
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* type = 32 bit data read/write, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x92, 0xCF, 0
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/* -- 16 bit real mode CS --
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* base = 0x00000000, limit 0x0FFFF (1 B Granularity), present
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* type = 16 bit code execute/read only/conforming, DPL = 0
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*/
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.word 0xFFFF
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LOCAL(cs_base_bytes12):
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.word 0
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LOCAL(cs_base_byte3):
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.byte 0
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.byte 0x9E, 0, 0
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/* -- 16 bit real mode DS --
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* base = 0x00000000, limit 0x0FFFF (1 B Granularity), present
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* type = 16 bit data read/write, DPL = 0
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*/
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.word 0xFFFF, 0
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.byte 0, 0x92, 0, 0
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LOCAL(gdt_end):
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VARIABLE(grub_relocator16_end)
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