671 lines
16 KiB
C
671 lines
16 KiB
C
/* ohci.c - OHCI Support. */
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/*
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* GRUB -- GRand Unified Bootloader
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* Copyright (C) 2008 Free Software Foundation, Inc.
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*
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* GRUB is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GRUB is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <grub/dl.h>
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#include <grub/mm.h>
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#include <grub/usb.h>
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#include <grub/usbtrans.h>
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#include <grub/misc.h>
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#include <grub/pci.h>
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#include <grub/cpu/pci.h>
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#include <grub/cpu/io.h>
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#include <grub/time.h>
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#include <grub/cs5536.h>
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struct grub_ohci_hcca
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{
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/* Pointers to Interrupt Endpoint Descriptors. Not used by
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GRUB. */
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grub_uint32_t inttable[32];
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/* Current frame number. */
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grub_uint16_t framenumber;
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grub_uint16_t pad;
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/* List of completed TDs. */
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grub_uint32_t donehead;
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grub_uint8_t reserved[116];
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} __attribute__((packed));
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/* OHCI Endpoint Descriptor. */
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struct grub_ohci_ed
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{
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grub_uint32_t target;
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grub_uint32_t td_tail;
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grub_uint32_t td_head;
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grub_uint32_t next_ed;
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} __attribute__((packed));
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struct grub_ohci_td
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{
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/* Information used to construct the TOKEN packet. */
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grub_uint32_t token;
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grub_uint32_t buffer;
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grub_uint32_t next_td;
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grub_uint32_t buffer_end;
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} __attribute__((packed));
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typedef struct grub_ohci_td *grub_ohci_td_t;
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typedef struct grub_ohci_ed *grub_ohci_ed_t;
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struct grub_ohci
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{
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volatile grub_uint32_t *iobase;
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volatile struct grub_ohci_hcca *hcca;
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grub_uint32_t hcca_addr;
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struct grub_ohci *next;
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};
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static struct grub_ohci *ohci;
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typedef enum
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{
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GRUB_OHCI_REG_REVISION = 0x00,
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GRUB_OHCI_REG_CONTROL,
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GRUB_OHCI_REG_CMDSTATUS,
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GRUB_OHCI_REG_INTSTATUS,
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GRUB_OHCI_REG_INTENA,
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GRUB_OHCI_REG_INTDIS,
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GRUB_OHCI_REG_HCCA,
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GRUB_OHCI_REG_PERIODIC,
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GRUB_OHCI_REG_CONTROLHEAD,
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GRUB_OHCI_REG_CONTROLCURR,
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GRUB_OHCI_REG_BULKHEAD,
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GRUB_OHCI_REG_BULKCURR,
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GRUB_OHCI_REG_DONEHEAD,
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GRUB_OHCI_REG_FRAME_INTERVAL,
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GRUB_OHCI_REG_PERIODIC_START = 16,
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GRUB_OHCI_REG_RHUBA = 18,
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GRUB_OHCI_REG_RHUBPORT = 21
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} grub_ohci_reg_t;
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#define GRUB_OHCI_RHUB_PORT_POWER_MASK 0x300
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#define GRUB_OHCI_RHUB_PORT_ALL_POWERED 0x200
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#define GRUB_OHCI_REG_FRAME_INTERVAL_FSMPS_MASK 0x8fff0000
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#define GRUB_OHCI_REG_FRAME_INTERVAL_FSMPS_SHIFT 16
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/* XXX: Is this choice of timings sane? */
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#define GRUB_OHCI_FSMPS 0x2778
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#define GRUB_OHCI_PERIODIC_START 0x257f
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static grub_uint32_t
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grub_ohci_readreg32 (struct grub_ohci *o, grub_ohci_reg_t reg)
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{
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return grub_le_to_cpu32 (*(o->iobase + reg));
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}
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static void
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grub_ohci_writereg32 (struct grub_ohci *o,
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grub_ohci_reg_t reg, grub_uint32_t val)
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{
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*(o->iobase + reg) = grub_cpu_to_le32 (val);
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}
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/* Iterate over all PCI devices. Determine if a device is an OHCI
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controller. If this is the case, initialize it. */
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static int NESTED_FUNC_ATTR
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grub_ohci_pci_iter (grub_pci_device_t dev,
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grub_pci_id_t pciid)
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{
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grub_uint32_t interf;
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grub_uint32_t base;
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grub_pci_address_t addr;
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struct grub_ohci *o;
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grub_uint32_t revision;
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grub_uint32_t frame_interval;
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int cs5536;
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grub_uint32_t hcca_addr;
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/* Determine IO base address. */
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grub_dprintf ("ohci", "pciid = %x\n", pciid);
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if (pciid == GRUB_CS5536_PCIID)
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{
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grub_uint64_t basereg;
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cs5536 = 1;
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basereg = grub_cs5536_read_msr (dev, GRUB_CS5536_MSR_USB_OHCI_BASE);
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if (!(basereg & GRUB_CS5536_MSR_USB_BASE_MEMORY_ENABLE))
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{
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/* Shouldn't happen. */
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grub_dprintf ("ohci", "No OHCI address is assigned\n");
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return 0;
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}
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base = (basereg & GRUB_CS5536_MSR_USB_BASE_ADDR_MASK);
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basereg |= GRUB_CS5536_MSR_USB_BASE_BUS_MASTER;
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basereg &= ~GRUB_CS5536_MSR_USB_BASE_PME_ENABLED;
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basereg &= ~GRUB_CS5536_MSR_USB_BASE_PME_STATUS;
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grub_cs5536_write_msr (dev, GRUB_CS5536_MSR_USB_OHCI_BASE, basereg);
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}
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else
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{
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grub_uint32_t class_code;
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grub_uint32_t class;
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grub_uint32_t subclass;
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addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS);
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class_code = grub_pci_read (addr) >> 8;
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interf = class_code & 0xFF;
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subclass = (class_code >> 8) & 0xFF;
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class = class_code >> 16;
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/* If this is not an OHCI controller, just return. */
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if (class != 0x0c || subclass != 0x03 || interf != 0x10)
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return 0;
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addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
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base = grub_pci_read (addr);
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#if 0
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/* Stop if there is no IO space base address defined. */
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if (! (base & 1))
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return 0;
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#endif
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grub_dprintf ("ohci", "class=0x%02x 0x%02x interface 0x%02x\n",
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class, subclass, interf);
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}
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/* Allocate memory for the controller and register it. */
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o = grub_malloc (sizeof (*o));
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if (! o)
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return 1;
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o->iobase = grub_pci_device_map_range (dev, base, 0x100);
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grub_dprintf ("ohci", "base=%p\n", o->iobase);
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/* FIXME: create proper abstraction for this. */
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#ifdef GRUB_MACHINE_MIPS_YEELOONG
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hcca_addr = 0x05000100;
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#else
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/* Reserve memory for the HCCA. */
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hcca_addr = (grub_uint32_t) grub_memalign (256, 256);
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#endif
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o->hcca = grub_pci_device_map_range (dev, hcca_addr, 256);
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/* Check if the OHCI revision is actually 1.0 as supported. */
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revision = grub_ohci_readreg32 (o, GRUB_OHCI_REG_REVISION);
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grub_dprintf ("ohci", "OHCI revision=0x%02x\n", revision & 0xFF);
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if ((revision & 0xFF) != 0x10)
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goto fail;
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_RHUBA,
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(grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBA)
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& ~GRUB_OHCI_RHUB_PORT_POWER_MASK)
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| GRUB_OHCI_RHUB_PORT_ALL_POWERED);
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/* Backup the frame interval register. */
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frame_interval = grub_ohci_readreg32 (o, GRUB_OHCI_REG_FRAME_INTERVAL);
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/* Suspend the OHCI by issuing a reset. */
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, 1); /* XXX: Magic. */
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grub_millisleep (1);
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grub_dprintf ("ohci", "OHCI reset\n");
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/* Restore the frame interval register. */
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frame_interval = (frame_interval & ~GRUB_OHCI_REG_FRAME_INTERVAL_FSMPS_MASK)
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| (GRUB_OHCI_REG_FRAME_INTERVAL_FSMPS_SHIFT
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<< GRUB_OHCI_REG_FRAME_INTERVAL_FSMPS_SHIFT);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_FRAME_INTERVAL, frame_interval);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_PERIODIC_START,
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GRUB_OHCI_PERIODIC_START);
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/* Setup the HCCA. */
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_HCCA, hcca_addr);
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grub_dprintf ("ohci", "OHCI HCCA\n");
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/* Enable the OHCI. */
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL,
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(2 << 6));
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grub_dprintf ("ohci", "OHCI enable: 0x%02x\n",
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(grub_ohci_readreg32 (o, GRUB_OHCI_REG_CONTROL) >> 6) & 3);
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/* Link to ohci now that initialisation is successful. */
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o->next = ohci;
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ohci = o;
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return 0;
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fail:
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#ifndef GRUB_MACHINE_MIPS_YEELOONG
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if (o)
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grub_free ((void *) o->hcca);
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#endif
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grub_free (o);
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return 1;
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}
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static void
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grub_ohci_inithw (void)
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{
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grub_pci_iterate (grub_ohci_pci_iter);
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}
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static int
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grub_ohci_iterate (int (*hook) (grub_usb_controller_t dev))
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{
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struct grub_ohci *o;
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struct grub_usb_controller dev;
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for (o = ohci; o; o = o->next)
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{
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dev.data = o;
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if (hook (&dev))
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return 1;
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}
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return 0;
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}
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static void
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grub_ohci_transaction (grub_ohci_td_t td,
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grub_transfer_type_t type, unsigned int toggle,
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grub_size_t size, char *data)
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{
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grub_uint32_t token;
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grub_uint32_t buffer;
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grub_uint32_t buffer_end;
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grub_dprintf ("ohci", "OHCI transaction td=%p type=%d, toggle=%d, size=%d\n",
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td, type, toggle, size);
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switch (type)
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{
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case GRUB_USB_TRANSFER_TYPE_SETUP:
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token = 0 << 19;
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break;
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case GRUB_USB_TRANSFER_TYPE_IN:
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token = 2 << 19;
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break;
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case GRUB_USB_TRANSFER_TYPE_OUT:
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token = 1 << 19;
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break;
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default:
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token = 0;
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break;
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}
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/* Generate no interrupts. */
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token |= 7 << 21;
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/* Set the token. */
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token |= toggle << 24;
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token |= 1 << 25;
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buffer = (grub_uint32_t) data;
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buffer_end = buffer + size - 1;
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td->token = grub_cpu_to_le32 (token);
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td->buffer = grub_cpu_to_le32 (buffer);
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td->next_td = 0;
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td->buffer_end = grub_cpu_to_le32 (buffer_end);
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}
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static grub_usb_err_t
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grub_ohci_transfer (grub_usb_controller_t dev,
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grub_usb_transfer_t transfer)
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{
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struct grub_ohci *o = (struct grub_ohci *) dev->data;
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grub_ohci_ed_t ed;
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grub_ohci_td_t td_list;
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grub_uint32_t target;
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grub_uint32_t td_tail;
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grub_uint32_t td_head;
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grub_uint32_t status;
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grub_uint32_t control;
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grub_usb_err_t err;
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int i;
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/* Allocate an Endpoint Descriptor. */
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ed = grub_memalign (16, sizeof (*ed));
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if (! ed)
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return GRUB_USB_ERR_INTERNAL;
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td_list = grub_memalign (16, sizeof (*td_list) * (transfer->transcnt + 1));
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if (! td_list)
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{
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grub_free ((void *) ed);
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return GRUB_USB_ERR_INTERNAL;
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}
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grub_dprintf ("ohci", "alloc=%p\n", td_list);
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/* Setup all Transfer Descriptors. */
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for (i = 0; i < transfer->transcnt; i++)
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{
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grub_usb_transaction_t tr = &transfer->transactions[i];
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grub_ohci_transaction (&td_list[i], tr->pid, tr->toggle,
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tr->size, tr->data);
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td_list[i].next_td = grub_cpu_to_le32 (&td_list[i + 1]);
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}
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/* Setup the Endpoint Descriptor. */
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/* Set the device address. */
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target = transfer->devaddr;
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/* Set the endpoint. */
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target |= transfer->endpoint << 7;
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/* Set the device speed. */
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target |= (transfer->dev->speed == GRUB_USB_SPEED_LOW) << 13;
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/* Set the maximum packet size. */
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target |= transfer->max << 16;
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td_head = (grub_uint32_t) td_list;
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td_tail = (grub_uint32_t) &td_list[transfer->transcnt];
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ed->target = grub_cpu_to_le32 (target);
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ed->td_head = grub_cpu_to_le32 (td_head);
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ed->td_tail = grub_cpu_to_le32 (td_tail);
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ed->next_ed = grub_cpu_to_le32 (0);
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grub_dprintf ("ohci", "program OHCI\n");
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/* Program the OHCI to actually transfer. */
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switch (transfer->type)
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{
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case GRUB_USB_TRANSACTION_TYPE_BULK:
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{
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grub_dprintf ("ohci", "add to bulk list\n");
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status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CMDSTATUS);
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control = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CONTROL);
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/* Disable the Control and Bulk lists. */
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control &= ~(3 << 4);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL, control);
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/* Clear BulkListFilled. */
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status &= ~(1 << 2);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, status);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_BULKHEAD, (grub_uint32_t) ed);
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/* Enable the Bulk list. */
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control |= 1 << 5;
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL, control);
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/* Set BulkListFilled. */
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status |= 1 << 2;
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, status);
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break;
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}
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case GRUB_USB_TRANSACTION_TYPE_CONTROL:
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{
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grub_dprintf ("ohci", "add to control list\n");
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status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CMDSTATUS);
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control = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CONTROL);
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/* Disable the Control and Bulk lists. */
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control &= ~(3 << 4);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL, control);
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/* Clear ControlListFilled. */
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status &= ~(1 << 1);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, status);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROLHEAD,
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(grub_uint32_t) ed);
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROLHEAD+1,
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(grub_uint32_t) ed);
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/* Enable the Control list. */
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control |= 1 << 4;
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL, control);
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/* Set ControlListFilled. */
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status |= 1 << 1;
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grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, status);
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break;
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}
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}
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grub_dprintf ("ohci", "wait for completion\n");
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grub_dprintf ("ohci", "control=0x%02x status=0x%02x\n",
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grub_ohci_readreg32 (o, GRUB_OHCI_REG_CONTROL),
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grub_ohci_readreg32 (o, GRUB_OHCI_REG_CMDSTATUS));
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/* Wait until the transfer is completed or STALLs. */
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while ((ed->td_head & ~0xf) != (ed->td_tail & ~0xf))
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{
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grub_cpu_idle ();
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grub_dprintf ("ohci", "head=0x%02x tail=0x%02x\n", ed->td_head, ed->td_tail);
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/* Detected a STALL. */
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if (ed->td_head & 1)
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break;
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}
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grub_dprintf ("ohci", "complete\n");
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/* if (ed->td_head & 1) */
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/* err = GRUB_USB_ERR_STALL; */
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/* else if (ed->td */
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if (ed->td_head & 1)
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{
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grub_uint8_t errcode;
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grub_ohci_td_t tderr;
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tderr = (grub_ohci_td_t) grub_ohci_readreg32 (o,
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GRUB_OHCI_REG_DONEHEAD);
|
||
errcode = tderr->token >> 28;
|
||
|
||
switch (errcode)
|
||
{
|
||
case 0:
|
||
/* XXX: Should not happen! */
|
||
grub_error (GRUB_ERR_IO, "OHCI without reporting the reason");
|
||
err = GRUB_USB_ERR_INTERNAL;
|
||
break;
|
||
|
||
case 1:
|
||
/* XXX: CRC error. */
|
||
err = GRUB_USB_ERR_TIMEOUT;
|
||
break;
|
||
|
||
case 2:
|
||
err = GRUB_USB_ERR_BITSTUFF;
|
||
break;
|
||
|
||
case 3:
|
||
/* XXX: Data Toggle error. */
|
||
err = GRUB_USB_ERR_DATA;
|
||
break;
|
||
|
||
case 4:
|
||
err = GRUB_USB_ERR_STALL;
|
||
break;
|
||
|
||
case 5:
|
||
/* XXX: Not responding. */
|
||
err = GRUB_USB_ERR_TIMEOUT;
|
||
break;
|
||
|
||
case 6:
|
||
/* XXX: PID Check bits failed. */
|
||
err = GRUB_USB_ERR_BABBLE;
|
||
break;
|
||
|
||
case 7:
|
||
/* XXX: PID unexpected failed. */
|
||
err = GRUB_USB_ERR_BABBLE;
|
||
break;
|
||
|
||
case 8:
|
||
/* XXX: Data overrun error. */
|
||
err = GRUB_USB_ERR_DATA;
|
||
break;
|
||
|
||
case 9:
|
||
/* XXX: Data underrun error. */
|
||
err = GRUB_USB_ERR_DATA;
|
||
break;
|
||
|
||
case 10:
|
||
/* XXX: Reserved. */
|
||
err = GRUB_USB_ERR_NAK;
|
||
break;
|
||
|
||
case 11:
|
||
/* XXX: Reserved. */
|
||
err = GRUB_USB_ERR_NAK;
|
||
break;
|
||
|
||
case 12:
|
||
/* XXX: Buffer overrun. */
|
||
err = GRUB_USB_ERR_DATA;
|
||
break;
|
||
|
||
case 13:
|
||
/* XXX: Buffer underrun. */
|
||
err = GRUB_USB_ERR_DATA;
|
||
break;
|
||
|
||
default:
|
||
err = GRUB_USB_ERR_NAK;
|
||
break;
|
||
}
|
||
}
|
||
else
|
||
err = GRUB_USB_ERR_NONE;
|
||
|
||
/* Disable the Control and Bulk lists. */
|
||
control = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CONTROL);
|
||
control &= ~(3 << 4);
|
||
grub_ohci_writereg32 (o, GRUB_OHCI_REG_CONTROL, control);
|
||
|
||
/* Clear BulkListFilled and ControlListFilled. */
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_CMDSTATUS);
|
||
status &= ~((1 << 2) | (1 << 3));
|
||
grub_ohci_writereg32 (o, GRUB_OHCI_REG_CMDSTATUS, status);
|
||
|
||
/* XXX */
|
||
grub_free (td_list);
|
||
grub_free (ed);
|
||
|
||
return err;
|
||
}
|
||
|
||
static grub_err_t
|
||
grub_ohci_portstatus (grub_usb_controller_t dev,
|
||
unsigned int port, unsigned int enable)
|
||
{
|
||
struct grub_ohci *o = (struct grub_ohci *) dev->data;
|
||
grub_uint32_t status;
|
||
|
||
/* Reset the port. */
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBPORT + port);
|
||
status |= (1 << 4); /* XXX: Magic. */
|
||
grub_ohci_writereg32 (o, GRUB_OHCI_REG_RHUBPORT + port, status);
|
||
grub_millisleep (100);
|
||
|
||
/* End the reset signaling. */
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBPORT + port);
|
||
status |= (1 << 20); /* XXX: Magic. */
|
||
grub_ohci_writereg32 (o, GRUB_OHCI_REG_RHUBPORT + port, status);
|
||
grub_millisleep (10);
|
||
|
||
/* Enable the port. */
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBPORT + port);
|
||
status |= (enable << 1); /* XXX: Magic. */
|
||
grub_ohci_writereg32 (o, GRUB_OHCI_REG_RHUBPORT + port, status);
|
||
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBPORT + port);
|
||
grub_dprintf ("ohci", "portstatus=0x%02x\n", status);
|
||
|
||
return GRUB_ERR_NONE;
|
||
}
|
||
|
||
static grub_usb_speed_t
|
||
grub_ohci_detect_dev (grub_usb_controller_t dev, int port)
|
||
{
|
||
struct grub_ohci *o = (struct grub_ohci *) dev->data;
|
||
grub_uint32_t status;
|
||
|
||
status = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBPORT + port);
|
||
|
||
grub_dprintf ("ohci", "detect_dev status=0x%02x\n", status);
|
||
|
||
if (! (status & 1))
|
||
return GRUB_USB_SPEED_NONE;
|
||
else if (status & (1 << 9))
|
||
return GRUB_USB_SPEED_LOW;
|
||
else
|
||
return GRUB_USB_SPEED_FULL;
|
||
}
|
||
|
||
static int
|
||
grub_ohci_hubports (grub_usb_controller_t dev)
|
||
{
|
||
struct grub_ohci *o = (struct grub_ohci *) dev->data;
|
||
grub_uint32_t portinfo;
|
||
|
||
portinfo = grub_ohci_readreg32 (o, GRUB_OHCI_REG_RHUBA);
|
||
|
||
grub_dprintf ("ohci", "root hub ports=%d\n", portinfo & 0xFF);
|
||
|
||
/* The root hub has exactly two ports. */
|
||
return portinfo & 0xFF;
|
||
}
|
||
|
||
|
||
|
||
static struct grub_usb_controller_dev usb_controller =
|
||
{
|
||
.name = "ohci",
|
||
.iterate = grub_ohci_iterate,
|
||
.transfer = grub_ohci_transfer,
|
||
.hubports = grub_ohci_hubports,
|
||
.portstatus = grub_ohci_portstatus,
|
||
.detect_dev = grub_ohci_detect_dev
|
||
};
|
||
|
||
GRUB_MOD_INIT(ohci)
|
||
{
|
||
grub_ohci_inithw ();
|
||
grub_usb_controller_dev_register (&usb_controller);
|
||
}
|
||
|
||
GRUB_MOD_FINI(ohci)
|
||
{
|
||
grub_usb_controller_dev_unregister (&usb_controller);
|
||
}
|