129 lines
2.9 KiB
C
129 lines
2.9 KiB
C
#include <grub/dl.h>
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#include <grub/cache.h>
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#include <grub/arm/system.h>
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/* This is only about cache architecture. It doesn't imply
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the CPU architecture. */
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static enum
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{
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ARCH_UNKNOWN,
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ARCH_ARMV5_WRITE_THROUGH,
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ARCH_ARMV6,
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ARCH_ARMV6_UNIFIED,
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ARCH_ARMV7
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} type = ARCH_UNKNOWN;
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grub_uint32_t grub_arch_cache_dlinesz;
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grub_uint32_t grub_arch_cache_ilinesz;
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/* Prototypes for asm functions. */
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void grub_arch_sync_caches_armv6 (void *address, grub_size_t len);
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void grub_arch_sync_caches_armv7 (void *address, grub_size_t len);
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void grub_arm_disable_caches_mmu_armv6 (void);
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void grub_arm_disable_caches_mmu_armv7 (void);
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static void
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probe_caches (void)
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{
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grub_uint32_t main_id, cache_type;
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/* Read main ID Register */
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asm volatile ("mrc p15, 0, %0, c0, c0, 0": "=r"(main_id));
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switch ((main_id >> 16) & 0xf)
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{
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case 0x3:
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7:
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case 0xf:
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break;
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default:
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grub_fatal ("Unsupported ARM ID 0x%x", main_id);
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}
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/* Read Cache Type Register */
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asm volatile ("mrc p15, 0, %0, c0, c0, 1": "=r"(cache_type));
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switch (cache_type >> 24)
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{
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case 0x00:
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case 0x01:
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grub_arch_cache_dlinesz = 8 << ((cache_type >> 12) & 3);
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grub_arch_cache_ilinesz = 8 << (cache_type & 3);
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type = ARCH_ARMV5_WRITE_THROUGH;
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break;
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case 0x04:
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case 0x0a:
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case 0x0c:
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case 0x0e:
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case 0x1c:
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grub_arch_cache_dlinesz = 8 << ((cache_type >> 12) & 3);
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grub_arch_cache_ilinesz = 8 << (cache_type & 3);
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type = ARCH_ARMV6_UNIFIED;
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break;
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case 0x05:
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case 0x0b:
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case 0x0d:
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case 0x0f:
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case 0x1d:
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grub_arch_cache_dlinesz = 8 << ((cache_type >> 12) & 3);
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grub_arch_cache_ilinesz = 8 << (cache_type & 3);
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type = ARCH_ARMV6;
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break;
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case 0x80 ... 0x8f:
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grub_arch_cache_dlinesz = 4 << ((cache_type >> 16) & 0xf);
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grub_arch_cache_ilinesz = 4 << (cache_type & 0xf);
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type = ARCH_ARMV7;
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break;
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default:
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grub_fatal ("Unsupported cache type 0x%x", cache_type);
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}
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}
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void
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grub_arch_sync_caches (void *address, grub_size_t len)
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{
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if (type == ARCH_UNKNOWN)
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probe_caches ();
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switch (type)
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{
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case ARCH_ARMV6:
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grub_arch_sync_caches_armv6 (address, len);
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break;
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case ARCH_ARMV7:
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grub_arch_sync_caches_armv7 (address, len);
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break;
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/* Nothing to do. */
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case ARCH_ARMV5_WRITE_THROUGH:
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case ARCH_ARMV6_UNIFIED:
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break;
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/* Pacify GCC. */
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case ARCH_UNKNOWN:
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break;
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}
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}
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void
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grub_arm_disable_caches_mmu (void)
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{
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if (type == ARCH_UNKNOWN)
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probe_caches ();
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switch (type)
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{
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case ARCH_ARMV6_UNIFIED:
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case ARCH_ARMV6:
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grub_arm_disable_caches_mmu_armv6 ();
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break;
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case ARCH_ARMV7:
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grub_arm_disable_caches_mmu_armv7 ();
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break;
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/* Nothing to do. */
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case ARCH_ARMV5_WRITE_THROUGH:
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break;
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/* Pacify GCC. */
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case ARCH_UNKNOWN:
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break;
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}
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}
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