ggml : group all experts in a single ggml_mul_mat_id (#6505)
* ggml : group all experts in a single ggml_mul_mat_id cuda : improve mmid row copy * cuda : fix bin bcast with non-cont src0 * test-backend-ops : only run all mul mat tests for base types * llama : disable moe offloading with SYCL --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
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12 changed files with 971 additions and 821 deletions
181
ggml-cuda.cu
181
ggml-cuda.cu
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@ -1231,7 +1231,7 @@ static void ggml_cuda_op_mul_mat_cublas(
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if (compute_capability >= CC_VOLTA && (src0->type == GGML_TYPE_F16 || ggml_is_quantized(src0->type)) && ggml_is_contiguous(src0) && row_diff == src0->ne[1] && dst->op_params[0] == GGML_PREC_DEFAULT) {
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// convert src0 and src1 to fp16, multiply as fp16, convert dst to fp32
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ggml_cuda_pool_alloc<half> src0_as_f16(ctx.pool());
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ggml_cuda_pool_alloc<half> src0_as_f16(ctx.pool(id));
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if (src0->type != GGML_TYPE_F16) {
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const to_fp16_cuda_t to_fp16_cuda = ggml_get_to_fp16_cuda(src0->type);
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GGML_ASSERT(to_fp16_cuda != nullptr);
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@ -1241,7 +1241,7 @@ static void ggml_cuda_op_mul_mat_cublas(
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}
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const half * src0_ptr = src0->type == GGML_TYPE_F16 ? (const half *) src0_dd_i : src0_as_f16.get();
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ggml_cuda_pool_alloc<half> src1_as_f16(ctx.pool());
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ggml_cuda_pool_alloc<half> src1_as_f16(ctx.pool(id));
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if (src1->type != GGML_TYPE_F16) {
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const to_fp16_cuda_t to_fp16_cuda = ggml_get_to_fp16_cuda(src1->type);
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GGML_ASSERT(to_fp16_cuda != nullptr);
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@ -1250,7 +1250,7 @@ static void ggml_cuda_op_mul_mat_cublas(
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to_fp16_cuda(src1_ddf_i, src1_as_f16.get(), ne, stream);
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}
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const half * src1_ptr = src1->type == GGML_TYPE_F16 ? (const half *) src1_ddf_i : src1_as_f16.get();
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ggml_cuda_pool_alloc<half> dst_f16(ctx.pool(), row_diff*src1_ncols);
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ggml_cuda_pool_alloc<half> dst_f16(ctx.pool(id), row_diff*src1_ncols);
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const half alpha_f16 = 1.0f;
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const half beta_f16 = 0.0f;
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@ -1960,20 +1960,73 @@ static void ggml_cuda_mul_mat(ggml_backend_cuda_context & ctx, const ggml_tensor
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}
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}
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struct mmid_row_mapping {
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int32_t i1;
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int32_t i2;
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};
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static __global__ void k_copy_src1_to_contiguous(const char * __restrict__ src1_original, char * __restrict__ src1_contiguous,
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int * __restrict__ cur_src1_row, mmid_row_mapping * __restrict__ row_mapping,
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const char * __restrict ids, int64_t i02, size_t ids_nb1, size_t ids_nb0,
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int64_t ne11, int64_t ne10,
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size_t nb11, size_t nb12) {
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int32_t iid1 = blockIdx.x;
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int32_t id = blockIdx.y;
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const int32_t row_id_i = *(const int32_t *) (ids + iid1*ids_nb1 + id*ids_nb0);
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if (row_id_i != i02) {
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return;
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}
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const int64_t i11 = id % ne11;
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const int64_t i12 = iid1;
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__shared__ int src1_row;
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if (threadIdx.x == 0) {
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src1_row = atomicAdd(cur_src1_row, 1);
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row_mapping[src1_row] = {id, iid1};
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}
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__syncthreads();
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const float * src1_row_original = (const float *)(src1_original + i11*nb11 + i12*nb12);
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float * src1_row_contiguous = (float *)(src1_contiguous + src1_row*nb11);
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for (int i = threadIdx.x; i < ne10; i += blockDim.x) {
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src1_row_contiguous[i] = src1_row_original[i];
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}
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}
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static __global__ void k_copy_dst_from_contiguous(char * __restrict__ dst_original, const char * __restrict__ dst_contiguous,
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const mmid_row_mapping * __restrict__ row_mapping,
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int64_t ne0,
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size_t nb1, size_t nb2) {
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int32_t i = blockIdx.x;
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const int32_t i1 = row_mapping[i].i1;
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const int32_t i2 = row_mapping[i].i2;
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const float * dst_row_contiguous = (const float *)(dst_contiguous + i*nb1);
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float * dst_row_original = (float *)(dst_original + i1*nb1 + i2*nb2);
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for (int j = threadIdx.x; j < ne0; j += blockDim.x) {
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dst_row_original[j] = dst_row_contiguous[j];
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}
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}
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static void ggml_cuda_mul_mat_id(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * src0 = dst->src[0];
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const ggml_tensor * src1 = dst->src[1];
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const ggml_tensor * ids = dst->src[2];
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GGML_TENSOR_BINARY_OP_LOCALS
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GGML_ASSERT(!ggml_backend_buffer_is_cuda_split(src0->buffer) && "mul_mat_id does not support split buffers");
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cudaStream_t stream = ctx.stream();
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const size_t nb11 = src1->nb[1];
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const size_t nb1 = dst->nb[1];
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const int32_t id = ((int32_t *) dst->op_params)[0];
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const int32_t n_as = src0->ne[2];
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const int64_t n_as = ne02;
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const int64_t n_ids = ids->ne[0];
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std::vector<char> ids_host(ggml_nbytes(ids));
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const char * ids_dev = (const char *) ids->data;
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@ -1982,7 +2035,7 @@ static void ggml_cuda_mul_mat_id(ggml_backend_cuda_context & ctx, ggml_tensor *
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ggml_tensor src0_row = *src0;
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ggml_tensor src1_row = *src1;
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ggml_tensor dst_row = *dst;
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ggml_tensor dst_row = *dst;
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char * src0_original = (char *) src0->data;
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char * src1_original = (char *) src1->data;
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@ -1990,19 +2043,39 @@ static void ggml_cuda_mul_mat_id(ggml_backend_cuda_context & ctx, ggml_tensor *
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src0_row.ne[2] = 1;
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src0_row.ne[3] = 1;
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src0_row.nb[3] = src0->nb[2];
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src0_row.nb[3] = nb02;
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if (src1->ne[1] == 1) {
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for (int64_t i01 = 0; i01 < ids->ne[1]; i01++) {
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const int32_t row_id = *(const int32_t *) (ids_host.data() + i01*ids->nb[1] + id*ids->nb[0]);
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src1_row.ne[1] = 1;
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src1_row.ne[2] = 1;
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src1_row.ne[3] = 1;
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src1_row.nb[2] = nb11;
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src1_row.nb[3] = nb11;
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GGML_ASSERT(row_id >= 0 && row_id < n_as);
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dst_row.ne[1] = 1;
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dst_row.ne[2] = 1;
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dst_row.ne[3] = 1;
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dst_row.nb[2] = nb1;
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dst_row.nb[3] = nb1;
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src0_row.data = src0_original + row_id*src0->nb[2];
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src1_row.data = src1_original + i01*src1->nb[1];
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dst_row.data = dst_original + i01*dst->nb[1];
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if (ne12 == 1) {
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for (int64_t iid1 = 0; iid1 < ids->ne[1]; iid1++) {
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for (int64_t id = 0; id < n_ids; id++) {
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const int32_t i02 = *(const int32_t *) (ids_host.data() + iid1*ids->nb[1] + id*ids->nb[0]);
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ggml_cuda_mul_mat(ctx, &src0_row, &src1_row, &dst_row);
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GGML_ASSERT(i02 >= 0 && i02 < n_as);
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const int64_t i11 = id % ne11;
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const int64_t i12 = iid1;
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const int64_t i1 = id;
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const int64_t i2 = i12;
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src0_row.data = src0_original + i02*nb02;
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src1_row.data = src1_original + i11*nb11 + i12*nb12;
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dst_row.data = dst_original + i1*nb1 + i2*nb2;
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ggml_cuda_mul_mat(ctx, &src0_row, &src1_row, &dst_row);
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}
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}
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} else {
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ggml_cuda_pool_alloc<char> src1_contiguous(ctx.pool(), sizeof(float)*ggml_nelements(src1));
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@ -2011,54 +2084,69 @@ static void ggml_cuda_mul_mat_id(ggml_backend_cuda_context & ctx, ggml_tensor *
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src1_row.data = src1_contiguous.get();
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dst_row.data = dst_contiguous.get();
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for (int32_t row_id = 0; row_id < n_as; ++row_id) {
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for (int64_t i02 = 0; i02 < n_as; i02++) {
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int64_t num_src1_rows = 0;
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for (int64_t i01 = 0; i01 < ids->ne[1]; i01++) {
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const int32_t row_id_i = *(const int32_t *) (ids_host.data() + i01*ids->nb[1] + id*ids->nb[0]);
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if (row_id_i != row_id) {
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continue;
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for (int64_t iid1 = 0; iid1 < ids->ne[1]; iid1++) {
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for (int64_t id = 0; id < n_ids; id++) {
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const int32_t row_id_i = *(const int32_t *) (ids_host.data() + iid1*ids->nb[1] + id*ids->nb[0]);
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GGML_ASSERT(row_id_i >= 0 && row_id_i < n_as);
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if (row_id_i != i02) {
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continue;
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}
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num_src1_rows++;
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}
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GGML_ASSERT(row_id >= 0 && row_id < n_as);
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CUDA_CHECK(cudaMemcpyAsync(src1_contiguous.get() + num_src1_rows*nb11, src1_original + i01*nb11,
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nb11, cudaMemcpyDeviceToDevice, stream));
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num_src1_rows++;
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}
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if (num_src1_rows == 0) {
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continue;
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}
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src0_row.data = src0_original + row_id*src0->nb[2];
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ggml_cuda_pool_alloc<int> dev_cur_src1_row(ctx.pool(), 1);
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ggml_cuda_pool_alloc<mmid_row_mapping> dev_row_mapping(ctx.pool(), num_src1_rows);
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CUDA_CHECK(cudaMemsetAsync(dev_cur_src1_row.get(), 0, sizeof(int), stream));
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{
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dim3 block_dims(std::min((unsigned int)ne10, 768u));
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dim3 grid_dims(ids->ne[1], n_ids);
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k_copy_src1_to_contiguous<<<grid_dims, block_dims, 0, stream>>>(
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src1_original, src1_contiguous.get(),
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dev_cur_src1_row.get(), dev_row_mapping.get(),
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ids_dev, i02, ids->nb[1], ids->nb[0],
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ne11, ne10,
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nb11, nb12);
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CUDA_CHECK(cudaGetLastError());
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}
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src0_row.data = src0_original + i02*nb02;
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GGML_ASSERT(nb11 == sizeof(float)*ne10);
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GGML_ASSERT(nb1 == sizeof(float)*ne0);
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src1_row.ne[1] = num_src1_rows;
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dst_row.ne[1] = num_src1_rows;
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src1_row.nb[1] = nb11;
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src1_row.nb[2] = num_src1_rows*nb11;
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src1_row.nb[3] = num_src1_rows*nb11;
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dst_row.ne[1] = num_src1_rows;
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dst_row.nb[1] = nb1;
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dst_row.nb[2] = num_src1_rows*nb1;
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dst_row.nb[3] = num_src1_rows*nb1;
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ggml_cuda_mul_mat(ctx, &src0_row, &src1_row, &dst_row);
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num_src1_rows = 0;
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for (int64_t i01 = 0; i01 < ids->ne[1]; i01++) {
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const int32_t row_id_i = *(const int32_t *) (ids_host.data() + i01*ids->nb[1] + id*ids->nb[0]);
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if (row_id_i != row_id) {
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continue;
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}
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GGML_ASSERT(row_id >= 0 && row_id < n_as);
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CUDA_CHECK(cudaMemcpyAsync(dst_original + i01*nb1, dst_contiguous.get() + num_src1_rows*nb1,
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nb1, cudaMemcpyDeviceToDevice, stream));
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num_src1_rows++;
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{
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dim3 block_dims(std::min((unsigned int)ne0, 768u));
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dim3 grid_dims(num_src1_rows);
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k_copy_dst_from_contiguous<<<grid_dims, block_dims, 0, stream>>>(
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dst_original, dst_contiguous.get(),
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dev_row_mapping.get(),
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ne0,
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nb1, nb2);
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CUDA_CHECK(cudaGetLastError());
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}
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}
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}
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@ -2487,7 +2575,8 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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GGML_CALL static bool ggml_backend_cuda_offload_op(ggml_backend_t backend, const ggml_tensor * op) {
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const int min_batch_size = 32;
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return op->ne[1] >= min_batch_size && op->op != GGML_OP_GET_ROWS;
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return (op->ne[1] >= min_batch_size && op->op != GGML_OP_GET_ROWS) ||
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(op->ne[2] >= min_batch_size && op->op == GGML_OP_MUL_MAT_ID);
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GGML_UNUSED(backend);
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}
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