metal : add BS=1 kernel for flash attention (#6508)
* metal : add BS=1 kernel for flash attention (wip) * metal : support more than 1 warps * metal : opts * metal : opt * metal : switch to parallel reduce * metal : reduce registers * metal : simplify * metal : initial FA vec kernel
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Georgi Gerganov
GitHub
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260cdb2d08
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105332cc17
2 changed files with 361 additions and 32 deletions
274
ggml-metal.metal
274
ggml-metal.metal
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@ -2494,6 +2494,280 @@ template [[host_name("kernel_flash_attn_ext_f16_h112")]] kernel flash_attn_ext_f
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template [[host_name("kernel_flash_attn_ext_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<128, 8, 32>;
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template [[host_name("kernel_flash_attn_ext_f16_h256")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_f16<256, 8, 32>;
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#define HALF_MAX_HALF half(65504.0f/2) // Use neg. of this instead of -INFINITY to initialize KQ max vals to avoid NaN upon subtraction.
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template<int64_t D, int64_t C> // head size, queries per threadgroup, cache items per threadgroup
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kernel void kernel_flash_attn_ext_vec_f16(
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device const char * q,
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device const char * k,
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device const char * v,
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device const char * mask,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int64_t & ne02,
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constant int64_t & ne03,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant uint64_t & nb03,
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constant int64_t & ne10,
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constant int64_t & ne11,
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constant int64_t & ne12,
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constant int64_t & ne13,
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constant uint64_t & nb10,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant uint64_t & nb13,
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constant int64_t & ne31,
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constant uint64_t & nb31,
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constant int64_t & ne0,
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constant int64_t & ne1,
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constant int64_t & ne2,
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constant int64_t & ne3,
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constant float & scale,
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threadgroup half * shared [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]],
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ushort tiisg[[thread_index_in_simdgroup]],
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ushort sgitg[[simdgroup_index_in_threadgroup]]) {
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const short nsg = ntg.y; // number of simdgroups
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const short iq3 = tgpig[2];
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const short iq2 = tgpig[1];
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const short iq1 = tgpig[0];
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const short D4 = D/4;
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const short D8 = D/8;
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const short NW = N_SIMDWIDTH;
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const short SH = (C + 1); // shared memory per simdgroup in (half)
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const short T = D + nsg*SH; // shared memory size per query in (half)
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const short T4 = T/4; // shared memory size per query in (half4)
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threadgroup half * sq = (threadgroup half *) (shared + 0*D); // holds the query data
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threadgroup half4 * sq4 = (threadgroup half4 *) (shared + 0*D); // same as above but in half4
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threadgroup half * ss = (threadgroup half *) (shared + sgitg*SH + 1*D); // scratch buffer for attention and diagonal matrix
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threadgroup half4 * ss4 = (threadgroup half4 *) (shared + sgitg*SH + 1*D); // same as above but in half4
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threadgroup half4 * sr4 = (threadgroup half4 *) (shared + sgitg*D + 1*T); // scratch buffer for the results
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// store the result for all queries in local memory in 8x8 matrices (the O matrix from the paper)
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half4 lo[D4/NW];
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// load heads from Q to shared memory
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device const float4 * q4 = (device const float4 *) ((device const char *) q + (iq1*nb01 + iq2*nb02 + iq3*nb03));
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for (short i = tiisg; i < D4; i += NW) {
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if (iq1 < ne01) {
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sq4[i] = (half4) q4[i];
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} else {
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sq4[i] = 0.0h;
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}
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}
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// zero out lo
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for (short i = tiisg; i < D4; i += NW) {
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lo[i/NW] = 0.0h;
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}
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// zero out shared memory SH
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for (short i = tiisg; i < SH/4; i += NW) {
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ss4[i] = 0.0h;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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{
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half S = { 0.0h };
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half M = { -HALF_MAX_HALF };
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// assume K and V are same shape
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const short ne22 = ne12;
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const short ne23 = ne13;
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const uint nb21 = nb11;
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const uint nb22 = nb12;
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const uint nb23 = nb13;
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// broadcast
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const short rk2 = ne02/ne12;
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const short rk3 = ne03/ne13;
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const short rv2 = ne02/ne22;
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const short rv3 = ne03/ne23;
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// k indices
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const short ik2 = iq2 / rk2;
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const short ik3 = iq3 / rk3;
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// v indices
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const short iv2 = iq2 / rv2;
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const short iv3 = iq3 / rv3;
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// load the queries from shared memory into local memory
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half4 mq[D4];
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for (short ii = 0; ii < D4; ii += NW) {
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short i = ii + tiisg;
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mq[i] = sq4[i];
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}
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// pointer to the mask
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device const half4 * mp4 = (device const half4 *) (mask + iq1*nb31);
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// loop over the KV cache
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// each simdgroup handles blocks of Q rows and C columns
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for (int ic0 = 0; ic0 < ne11; ic0 += C*nsg) {
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const int ic = ic0 + C*sgitg;
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if (ic >= ne11) {
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break;
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}
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// Q*K^T
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{
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#pragma unroll
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for (short cc = 0; cc < C/4; ++cc) {
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half4 mqk = { 0.0h };
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device const half4 * pk4 = (device const half4 *) ((device const char *) k + ((ic + 4*cc)*nb11 + ik2*nb12 + ik3*nb13));
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#pragma unroll
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for (short ii = 0; ii < D4; ii += NW) {
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const short i = ii + tiisg;
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half4x4 mk;
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mk[0] = pk4[i + 0*(nb11/8)];
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mk[1] = pk4[i + 1*(nb11/8)];
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mk[2] = pk4[i + 2*(nb11/8)];
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mk[3] = pk4[i + 3*(nb11/8)];
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mqk += mq[i] * mk;
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}
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// reduce the results from the threads in the simdgroup
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mqk += simd_shuffle_down(mqk, 16);
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mqk += simd_shuffle_down(mqk, 8);
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mqk += simd_shuffle_down(mqk, 4);
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mqk += simd_shuffle_down(mqk, 2);
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mqk += simd_shuffle_down(mqk, 1);
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// mqk = mqk*scale + mask
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if (tiisg == 0) {
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half4 mm = mp4[ic/4 + cc];
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mqk = mqk*scale + mm;
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ss4[cc] = mqk;
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}
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}
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}
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// online softmax
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{
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const short p = tiisg;
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const half m = M;
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const half s = ss[p];
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M = simd_max(max(M, s));
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const half ms = exp(m - M);
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const half vs = exp(s - M);
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S = S*ms + simd_sum(vs);
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// the P matrix from the paper (Q rows, C columns)
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ss[p] = vs;
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// O = diag(ms)*O
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#pragma unroll
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for (short ii = 0; ii < D4; ii += NW) {
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const short i = ii + tiisg;
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lo[i/NW] *= ms;
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}
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}
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// O = O + (Q*K^T)*V
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{
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#pragma unroll
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for (short cc = 0; cc < C/4; ++cc) {
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device const half4 * pv4 = (device const half4 *) ((device const char *) v + ((ic + 4*cc)*nb21 + iv2*nb22 + iv3*nb23));
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#pragma unroll
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for (short ii = 0; ii < D4; ii += NW) {
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const short i = ii + tiisg;
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lo[i/NW] += pv4[i + 0*(nb21/8)] * ss[4*cc + 0];
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lo[i/NW] += pv4[i + 1*(nb21/8)] * ss[4*cc + 1];
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lo[i/NW] += pv4[i + 2*(nb21/8)] * ss[4*cc + 2];
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lo[i/NW] += pv4[i + 3*(nb21/8)] * ss[4*cc + 3];
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}
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}
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}
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}
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// these are needed for reducing the results from the simdgroups (reuse the ss buffer)
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if (tiisg == 0) {
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ss[0] = S;
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ss[1] = M;
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}
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}
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// store results to shared memory
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for (short ii = 0; ii < D4; ii += NW) {
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short i = ii + tiisg;
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sr4[i] = lo[ii/NW];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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// parallel reduce
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for (short r = nsg/2; r > 0; r >>= 1) {
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if (sgitg < r) {
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const half S0 = ss[ 0];
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const half S1 = ss[r*SH + 0];
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const half M0 = ss[ 1];
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const half M1 = ss[r*SH + 1];
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const half M = max(M0, M1);
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const half ms0 = exp(M0 - M);
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const half ms1 = exp(M1 - M);
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const half S = S0*ms0 + S1*ms1;
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if (tiisg == 0) {
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ss[0] = S;
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ss[1] = M;
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}
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// O_0 = diag(ms0)*O_0 + diag(ms1)*O_1
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for (short ii = 0; ii < D4; ii += NW) {
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short i = ii + tiisg;
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sr4[i] = sr4[i]*ms0 + sr4[i + r*D4]*ms1;
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}
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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device float4 * dst4 = (device float4 *) dst;
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// final rescale with 1/S and store to global memory
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if (sgitg == 0) {
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const half S = ss[0];
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for (short ii = 0; ii < D4; ii += NW) {
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short i = ii + tiisg;
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dst4[(iq3*ne2*ne1 + iq2 + (iq1)*ne1)*D4 + i] = (float4) sr4[i]/S;
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}
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}
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}
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template [[host_name("kernel_flash_attn_ext_vec_f16_h128")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_vec_f16<128, 32>;
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template [[host_name("kernel_flash_attn_ext_vec_f16_h256")]] kernel flash_attn_ext_f16_t kernel_flash_attn_ext_vec_f16<256, 32>;
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kernel void kernel_cpy_f16_f16(
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device const half * src0,
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device half * dst,
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