ggml : refactor online repacking (#10446)
* rename ggml-cpu-aarch64.c to .cpp
* reformat extra cpu backend.
- clean Q4_0_N_M and IQ4_0_N_M
- remove from "file" tensor type
- allow only with dynamic repack
- extract cpu extra bufts and convert to C++
- hbm
- "aarch64"
- more generic use of extra buffer
- generalise extra_supports_op
- new API for "cpu-accel":
- amx
- aarch64
* clang-format
* Clean Q4_0_N_M ref
Enable restrict on C++
* add op GGML_OP_MUL_MAT_ID for Q4_0_N_M with runtime repack
* added/corrected control on tensor size for Q4 repacking.
* Update ggml/src/ggml-cpu/ggml-cpu-aarch64.cpp
Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
* Update ggml/src/ggml-cpu/ggml-cpu-aarch64.cpp
Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
* add debug logs on repacks.
---------
Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
This commit is contained in:
Djip007
GitHub
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33 changed files with 1136 additions and 1049 deletions
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@ -5,6 +5,7 @@
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#include "ggml-backend.h"
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#include "ggml-impl.h"
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#include "ggml-cpu.h"
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#include "ggml-cpu-traits.h"
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#if defined(__gnu_linux__)
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#include <sys/syscall.h>
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@ -17,31 +18,65 @@
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#if defined(__AMX_INT8__) && defined(__AVX512VNNI__)
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// AMX type_trais
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namespace ggml::cpu::amx {
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class tensor_traits : public ggml::cpu::tensor_traits {
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bool work_size(int /* n_threads */, const struct ggml_tensor * op, size_t & size) override {
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size = ggml_backend_amx_desired_wsize(op);
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return true;
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}
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bool compute_forward(struct ggml_compute_params * params, struct ggml_tensor * op) override {
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if (op->op == GGML_OP_MUL_MAT) {
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ggml_backend_amx_mul_mat(params, op);
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return true;
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}
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return false;
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}
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};
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static ggml::cpu::tensor_traits * get_tensor_traits(ggml_backend_buffer_t, struct ggml_tensor *) {
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static tensor_traits traits;
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return &traits;
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}
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} // namespace ggml::cpu::amx
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// AMX buffer interface
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static void ggml_backend_amx_buffer_free_buffer(ggml_backend_buffer_t buffer) {
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free(buffer->context);
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}
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static void * ggml_backend_amx_buffer_get_base(ggml_backend_buffer_t buffer) {
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return (void *)(buffer->context);
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return (void *) (buffer->context);
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}
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static void ggml_backend_amx_buffer_memset_tensor(ggml_backend_buffer_t buffer, struct ggml_tensor * tensor, uint8_t value, size_t offset, size_t size) {
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memset((char *)tensor->data + offset, value, size);
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static void ggml_backend_amx_buffer_init_tensor(ggml_backend_buffer_t buffer, struct ggml_tensor * tensor) {
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tensor->extra = (void *) ggml::cpu::amx::get_tensor_traits(buffer, tensor);
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GGML_UNUSED(buffer);
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}
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static void ggml_backend_amx_buffer_set_tensor(ggml_backend_buffer_t buffer, struct ggml_tensor * tensor, const void * data, size_t offset, size_t size) {
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static void ggml_backend_amx_buffer_memset_tensor(ggml_backend_buffer_t buffer, struct ggml_tensor * tensor,
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uint8_t value, size_t offset, size_t size) {
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memset((char *) tensor->data + offset, value, size);
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GGML_UNUSED(buffer);
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}
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static void ggml_backend_amx_buffer_set_tensor(ggml_backend_buffer_t buffer, struct ggml_tensor * tensor,
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const void * data, size_t offset, size_t size) {
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if (qtype_has_amx_kernels(tensor->type)) {
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GGML_LOG_DEBUG("%s: amx repack tensor %s of type %s\n", __func__, tensor->name, ggml_type_name(tensor->type));
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ggml_backend_amx_convert_weight(tensor, data, offset, size);
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} else {
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memcpy((char *)tensor->data + offset, data, size);
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memcpy((char *) tensor->data + offset, data, size);
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}
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GGML_UNUSED(buffer);
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}
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/*
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// need to figure what we need to do with buffer->extra.
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static void ggml_backend_amx_buffer_get_tensor(ggml_backend_buffer_t buffer, const struct ggml_tensor * tensor, void * data, size_t offset, size_t size) {
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GGML_ASSERT(!qtype_has_amx_kernels(tensor->type));
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memcpy(data, (const char *)tensor->data + offset, size);
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@ -62,6 +97,7 @@ static bool ggml_backend_amx_buffer_cpy_tensor(ggml_backend_buffer_t buffer, con
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GGML_UNUSED(buffer);
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}
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*/
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static void ggml_backend_amx_buffer_clear(ggml_backend_buffer_t buffer, uint8_t value) {
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memset(buffer->context, value, buffer->size);
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@ -70,13 +106,13 @@ static void ggml_backend_amx_buffer_clear(ggml_backend_buffer_t buffer, uint8_t
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static ggml_backend_buffer_i ggml_backend_amx_buffer_interface = {
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/* .free_buffer = */ ggml_backend_amx_buffer_free_buffer,
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/* .get_base = */ ggml_backend_amx_buffer_get_base,
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/* .init_tensor = */ NULL, // no initialization required
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/* .init_tensor = */ ggml_backend_amx_buffer_init_tensor,
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/* .memset_tensor = */ ggml_backend_amx_buffer_memset_tensor,
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/* .set_tensor = */ ggml_backend_amx_buffer_set_tensor,
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/* .get_tensor = */ ggml_backend_amx_buffer_get_tensor,
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/* .cpy_tensor = */ ggml_backend_amx_buffer_cpy_tensor,
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/* .get_tensor = */ nullptr,
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/* .cpy_tensor = */ nullptr,
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/* .clear = */ ggml_backend_amx_buffer_clear,
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/* .reset = */ NULL,
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/* .reset = */ nullptr,
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};
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static const char * ggml_backend_amx_buffer_type_get_name(ggml_backend_buffer_type_t buft) {
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@ -101,18 +137,48 @@ static size_t ggml_backend_amx_buffer_type_get_alignment(ggml_backend_buffer_typ
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GGML_UNUSED(buft);
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}
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static size_t ggml_backend_amx_buffer_type_get_alloc_size(ggml_backend_buffer_type_t buft, const ggml_tensor* tensor) {
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namespace ggml::cpu::amx {
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class extra_buffer_type : ggml::cpu::extra_buffer_type {
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bool supports_op(ggml_backend_dev_t, const struct ggml_tensor * op) override {
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// handle only 2d gemm for now
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auto is_contiguous_2d = [](const struct ggml_tensor * t) {
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return ggml_is_contiguous(t) && t->ne[3] == 1 && t->ne[2] == 1;
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};
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if (op->op == GGML_OP_MUL_MAT && is_contiguous_2d(op->src[0]) && // src0 must be contiguous
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is_contiguous_2d(op->src[1]) && // src1 must be contiguous
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op->src[0]->buffer && op->src[0]->buffer->buft == ggml_backend_amx_buffer_type() &&
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op->ne[0] % (TILE_N * 2) == 0 && // out_features is 32x
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(qtype_has_amx_kernels(op->src[0]->type) || (op->src[0]->type == GGML_TYPE_F16))) {
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// src1 must be host buffer
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if (op->src[1]->buffer && !ggml_backend_buft_is_host(op->src[1]->buffer->buft)) {
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return false;
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}
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// src1 must be float32
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if (op->src[1]->type == GGML_TYPE_F32) {
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return true;
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}
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}
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return false;
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}
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ggml::cpu::tensor_traits * get_tensor_traits(const struct ggml_tensor * op) override {
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if (op->op == GGML_OP_MUL_MAT && op->src[0]->buffer &&
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op->src[0]->buffer->buft == ggml_backend_amx_buffer_type()) {
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return (ggml::cpu::tensor_traits *) op->src[0]->extra;
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}
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return nullptr;
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}
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};
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} // namespace ggml::cpu::amx
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static size_t ggml_backend_amx_buffer_type_get_alloc_size(ggml_backend_buffer_type_t buft, const ggml_tensor * tensor) {
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return ggml_backend_amx_get_alloc_size(tensor);
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GGML_UNUSED(buft);
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}
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static bool ggml_backend_amx_buffer_type_is_host(ggml_backend_buffer_type_t buft) {
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return false;
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GGML_UNUSED(buft);
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}
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#define ARCH_GET_XCOMP_PERM 0x1022
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#define ARCH_REQ_XCOMP_PERM 0x1023
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#define XFEATURE_XTILECFG 17
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@ -129,68 +195,26 @@ static bool ggml_amx_init() {
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return true;
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#endif
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}
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ggml_backend_buffer_type_t ggml_backend_amx_buffer_type() {
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static struct ggml_backend_buffer_type ggml_backend_buffer_type_amx = {
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/* .iface = */ {
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/* .get_name = */ ggml_backend_amx_buffer_type_get_name,
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/* .alloc_buffer = */ ggml_backend_amx_buffer_type_alloc_buffer,
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/* .get_alignment = */ ggml_backend_amx_buffer_type_get_alignment,
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/* .get_max_size = */ NULL, // defaults to SIZE_MAX
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/* .get_alloc_size = */ ggml_backend_amx_buffer_type_get_alloc_size,
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/* .is_host = */ ggml_backend_amx_buffer_type_is_host,
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},
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/* .get_name = */ ggml_backend_amx_buffer_type_get_name,
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/* .alloc_buffer = */ ggml_backend_amx_buffer_type_alloc_buffer,
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/* .get_alignment = */ ggml_backend_amx_buffer_type_get_alignment,
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/* .get_max_size = */ nullptr, // defaults to SIZE_MAX
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/* .get_alloc_size = */ ggml_backend_amx_buffer_type_get_alloc_size,
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/* .is_host = */ nullptr,
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},
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/* .device = */ ggml_backend_reg_dev_get(ggml_backend_cpu_reg(), 0),
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/* .context = */ NULL,
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/* .context = */ new ggml::cpu::amx::extra_buffer_type(),
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};
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if (!ggml_amx_init()) {
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return NULL;
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return nullptr;
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}
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return &ggml_backend_buffer_type_amx;
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}
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bool ggml_backend_amx_buft_is_amx(ggml_backend_buffer_type_t buft) {
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return buft->iface.get_name == ggml_backend_amx_buffer_type_get_name;
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}
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bool ggml_backend_amx_device_supports_op(const struct ggml_tensor * op) {
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// handle only 2d gemm for now
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auto is_contiguous_2d = [](const struct ggml_tensor * t) {
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return ggml_is_contiguous(t) && t->ne[3] == 1 && t->ne[2] == 1;
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};
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switch (op->op) {
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case GGML_OP_NONE:
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case GGML_OP_RESHAPE:
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case GGML_OP_VIEW:
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case GGML_OP_PERMUTE:
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case GGML_OP_TRANSPOSE:
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return true;
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case GGML_OP_MUL_MAT: {
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const struct ggml_tensor * src0 = op->src[0];
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const struct ggml_tensor * src1 = op->src[1];
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const enum ggml_type type = src0->type;
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const int64_t ne0 = op->ne[0];
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// amx kernels enables for Q4_0, Q4_1, Q8_0, F16
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// Q4_K, Q5_K, Q6_K, IQ4_XS enabled for QK_K = 256
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bool has_amx_kernels = qtype_has_amx_kernels(type) || (type == GGML_TYPE_F16);
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bool can_use_amx =
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is_contiguous_2d(src0) && // src0 must be contiguous
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is_contiguous_2d(src1) && // src1 must be contiguous
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src1->type == GGML_TYPE_F32 && // src1 must be float32
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has_amx_kernels && // with amx kernel impls
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ne0 % (TILE_N * 2) == 0; // out_features is 32x
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return can_use_amx;
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}
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default:
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return false;
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}
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}
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#endif // defined(__AMX_INT8__) && defined(__AVX512VNNI__)
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#endif // defined(__AMX_INT8__) && defined(__AVX512VNNI__)
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