fix q4_0/q4_1 mmv, 65 -> 49 failures
This commit is contained in:
parent
0787b80db8
commit
1a14099c43
6 changed files with 92 additions and 68 deletions
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@ -464,6 +464,7 @@ if (LLAMA_KOMPUTE)
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DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/${source}
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DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/${source}
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/common.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/common.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/op_getrows.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/op_getrows.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/op_mul_mv_q_n_pre.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/op_mul_mv_q_n.comp
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${CMAKE_CURRENT_SOURCE_DIR}/kompute-shaders/op_mul_mv_q_n.comp
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COMMAND ${glslc_executable} --target-env=vulkan1.2 -o ${spv_file} ${CMAKE_CURRENT_SOURCE_DIR}/${source}
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COMMAND ${glslc_executable} --target-env=vulkan1.2 -o ${spv_file} ${CMAKE_CURRENT_SOURCE_DIR}/${source}
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COMMENT "Compiling ${source} to ${spv_file}"
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COMMENT "Compiling ${source} to ${spv_file}"
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@ -1003,32 +1003,40 @@ static void ggml_vk_mul_mat_mat_f32(kp::Sequence& seq,
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seq.record<kp::OpAlgoDispatch>(s_algo);
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seq.record<kp::OpAlgoDispatch>(s_algo);
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}
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}
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static void ggml_vk_mul_mat_q4_x(
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static void ggml_vk_mul_mat_impl(
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const std::vector<uint32_t>& spirv, const char * suffix, uint32_t block_size, kp::Sequence& seq,
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const std::vector<uint32_t>& spirv, const char * suffix, uint32_t block_size, kp::Sequence& seq,
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const std::shared_ptr<kp::Tensor>& inA,
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const std::shared_ptr<kp::Tensor>& inA,
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const std::shared_ptr<kp::Tensor>& inB,
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const std::shared_ptr<kp::Tensor>& inB,
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const std::shared_ptr<kp::Tensor>& out,
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const std::shared_ptr<kp::Tensor>& out,
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uint32_t inAOff, uint32_t inBOff, uint32_t outOff,
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uint32_t inAOff, uint32_t inBOff, uint32_t outOff,
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int32_t ne00, int32_t ne10, int32_t ne0, int32_t ne1,
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int32_t ne00, int32_t ne01, int32_t ne02,
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int32_t ne01, int32_t ne11, int32_t ne12, int32_t ne02
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int32_t ne10, int32_t ne11, int32_t ne12, int32_t ne13,
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int32_t ne0, int32_t ne1,
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uint32_t r2, uint32_t r3
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) {
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) {
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struct PushConstants {
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struct PushConstants {
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uint32_t inAOff, inBOff, outOff;
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uint32_t inAOff, inBOff, outOff;
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int32_t ne00, ne10, ne0, ne1, ne01, gqa;
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int32_t ne00, ne01, ne02;
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int32_t ne10, ne12;
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int32_t ne0, ne1;
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uint32_t r2, r3;
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} pushConsts {
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} pushConsts {
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safe_divide(inAOff, block_size), safe_divide(inBOff, 4), safe_divide(outOff, 4),
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safe_divide(inAOff, block_size), safe_divide(inBOff, 4), safe_divide(outOff, 4),
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ne00, ne10, ne0, ne1, ne01, ne12/ne02
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ne00, ne01, ne02,
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ne10, ne12,
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ne0, ne1,
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r2, r3
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};
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};
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auto name = std::string(__func__) + "_" + suffix;
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auto name = std::string(__func__) + "_" + suffix;
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std::shared_ptr<kp::Algorithm> s_algo = nullptr;
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std::shared_ptr<kp::Algorithm> s_algo = nullptr;
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if (!komputeManager()->hasAlgorithm(name)) {
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if (!komputeManager()->hasAlgorithm(name)) {
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const uint32_t local_x = ggml_vk_current_device().subgroupSize * 2;
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const uint32_t local_x = ggml_vk_current_device().subgroupSize * 2;
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s_algo = komputeManager()->algorithm<uint32_t, PushConstants>(__func__, s_kompute_context->pool.get(), {inA, inB, out}, spirv, {unsigned((ne01 + 7)/8), unsigned(ne11), unsigned(ne12)}, {local_x}, {pushConsts});
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s_algo = komputeManager()->algorithm<uint32_t, PushConstants>(__func__, s_kompute_context->pool.get(), {inA, inB, out}, spirv, {unsigned((ne01 + 7)/8), unsigned(ne11), unsigned(ne12*ne13)}, {local_x}, {pushConsts});
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} else {
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} else {
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s_algo = komputeManager()->getAlgorithm(name);
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s_algo = komputeManager()->getAlgorithm(name);
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s_algo->setTensors({inA, inB, out});
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s_algo->setTensors({inA, inB, out});
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s_algo->setWorkgroup({unsigned((ne01 + 7)/8), unsigned(ne11), unsigned(ne12)});
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s_algo->setWorkgroup({unsigned((ne01 + 7)/8), unsigned(ne11), unsigned(ne12*ne13)});
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s_algo->setPushConstants<PushConstants>({pushConsts});
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s_algo->setPushConstants<PushConstants>({pushConsts});
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s_algo->updateDescriptors(s_kompute_context->pool.get());
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s_algo->updateDescriptors(s_kompute_context->pool.get());
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}
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}
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@ -1040,7 +1048,7 @@ static void ggml_vk_mul_mat_q4_0(Args&&... args) {
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q4_0_comp_spv,
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q4_0_comp_spv,
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kp::shader_data::op_mul_mat_q4_0_comp_spv_len);
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kp::shader_data::op_mul_mat_q4_0_comp_spv_len);
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ggml_vk_mul_mat_q4_x(spirv, "q4_0", 1/*We access blocks unaligned*/, std::forward<Args>(args)...);
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ggml_vk_mul_mat_impl(spirv, "q4_0", 1/*We access blocks unaligned*/, std::forward<Args>(args)...);
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}
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}
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template <typename... Args>
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template <typename... Args>
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@ -1048,16 +1056,18 @@ static void ggml_vk_mul_mat_q4_1(Args&&... args) {
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q4_1_comp_spv,
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q4_1_comp_spv,
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kp::shader_data::op_mul_mat_q4_1_comp_spv_len);
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kp::shader_data::op_mul_mat_q4_1_comp_spv_len);
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ggml_vk_mul_mat_q4_x(spirv, "q4_1", 1/*We access blocks unaligned*/, std::forward<Args>(args)...);
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ggml_vk_mul_mat_impl(spirv, "q4_1", 1/*We access blocks unaligned*/, std::forward<Args>(args)...);
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}
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}
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static void ggml_vk_mul_mat_q6_k(kp::Sequence& seq,
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static void ggml_vk_mul_mat_q6_k(
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const std::shared_ptr<kp::Tensor>& inA,
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kp::Sequence& seq,
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const std::shared_ptr<kp::Tensor>& inB,
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const std::shared_ptr<kp::Tensor>& inA,
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const std::shared_ptr<kp::Tensor>& out,
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const std::shared_ptr<kp::Tensor>& inB,
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uint32_t inAOff, uint32_t inBOff, uint32_t outOff,
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const std::shared_ptr<kp::Tensor>& out,
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int32_t ne00, int32_t ne10, int32_t ne0, int32_t ne1,
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uint32_t inAOff, uint32_t inBOff, uint32_t outOff,
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int32_t ne01, int32_t ne11, int32_t ne12, int32_t ne02) {
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int32_t ne00, int32_t ne10, int32_t ne0, int32_t ne1,
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int32_t ne01, int32_t ne11, int32_t ne12, int32_t ne02
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) {
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q6_k_comp_spv,
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const static auto spirv = getSpirvShader(kp::shader_data::op_mul_mat_q6_k_comp_spv,
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kp::shader_data::op_mul_mat_q6_k_comp_spv_len);
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kp::shader_data::op_mul_mat_q6_k_comp_spv_len);
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@ -1550,6 +1560,15 @@ void ggml_vk_graph_compute(struct ggml_kompute_context * ctx, struct ggml_cgraph
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} break;
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} break;
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case GGML_OP_MUL_MAT:
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case GGML_OP_MUL_MAT:
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{
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{
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GGML_ASSERT(ne00 == ne10);
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// TODO: assert that dim2 and dim3 are contiguous
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GGML_ASSERT(ne12 % ne02 == 0);
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GGML_ASSERT(ne13 % ne03 == 0);
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const uint32_t r2 = ne12/ne02;
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const uint32_t r3 = ne13/ne03;
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if (src1t != GGML_TYPE_F32) {
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if (src1t != GGML_TYPE_F32) {
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fprintf(stderr, "%s: %s: Unsupported src1 type: %u/%u\n", __func__, ggml_op_name(dst->op), src0t, src1t);
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fprintf(stderr, "%s: %s: Unsupported src1 type: %u/%u\n", __func__, ggml_op_name(dst->op), src0t, src1t);
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goto not_implemented;
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goto not_implemented;
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@ -1563,29 +1582,40 @@ void ggml_vk_graph_compute(struct ggml_kompute_context * ctx, struct ggml_cgraph
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switch (src0t) {
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switch (src0t) {
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case GGML_TYPE_F32:
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case GGML_TYPE_F32:
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ggml_vk_mul_mat_mat_f32(seq,
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ggml_vk_mul_mat_mat_f32(
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id_src0, id_src1, id_dst,
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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off_src0, off_src1, off_dst,
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ne00, ne01, ne02, nb01, nb02, ne11, ne12, nb11, nb12, nb1, nb2
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ne00, ne01, ne02,
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);
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nb01, nb02,
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ne11, ne12,
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nb11, nb12,
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nb1, nb2);
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break;
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break;
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case GGML_TYPE_F16:
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case GGML_TYPE_F16:
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ggml_vk_mul_mat_f16(seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst, ne00, ne01, ne02, nb01, nb02, ne11, ne12, nb11, nb12, ne0, ne1);
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ggml_vk_mul_mat_f16(
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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ne00, ne01, ne02, nb01, nb02, ne11, ne12, nb11, nb12, ne0, ne1
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);
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break;
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break;
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case GGML_TYPE_Q8_0:
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case GGML_TYPE_Q8_0:
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ggml_vk_mul_mat_q8_0(seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst, ne00, ne01, nb01, nb02, ne11, ne12, nb11, nb12, ne0, ne1);
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ggml_vk_mul_mat_q8_0(
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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ne00, ne01, nb01, nb02, ne11, ne12, nb11, nb12, ne0, ne1
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);
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break;
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break;
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case GGML_TYPE_Q4_0:
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case GGML_TYPE_Q4_0:
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ggml_vk_mul_mat_q4_0(seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst, ne00, ne10, ne0, ne1, ne01, ne11, ne12, ne02);
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ggml_vk_mul_mat_q4_0(
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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ne00, ne01, ne02, ne10, ne11, ne12, ne13, ne0, ne1, r2, r3
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);
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break;
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break;
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case GGML_TYPE_Q4_1:
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case GGML_TYPE_Q4_1:
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ggml_vk_mul_mat_q4_1(seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst, ne00, ne10, ne0, ne1, ne01, ne11, ne12, ne02);
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ggml_vk_mul_mat_q4_1(
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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ne00, ne01, ne02, ne10, ne11, ne12, ne13, ne0, ne1, r2, r3
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);
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break;
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break;
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case GGML_TYPE_Q6_K:
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case GGML_TYPE_Q6_K:
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ggml_vk_mul_mat_q6_k(seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst, ne00, ne10, ne0, ne1, ne01, ne11, ne12, ne02);
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ggml_vk_mul_mat_q6_k(
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seq, id_src0, id_src1, id_dst, off_src0, off_src1, off_dst,
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ne00, ne10, ne0, ne1, ne01, ne11, ne12, ne02
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);
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break;
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break;
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default: {
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default: {
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fprintf(stderr, "%s: %s: Unsupported quantization: %u/%u\n", __func__, ggml_op_name(dst->op), src0t, src1t);
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fprintf(stderr, "%s: %s: Unsupported quantization: %u/%u\n", __func__, ggml_op_name(dst->op), src0t, src1t);
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@ -6,25 +6,7 @@
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#define SIZE_OF_BLOCK sizeof_block_q4_0
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#define SIZE_OF_BLOCK sizeof_block_q4_0
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#define N_ROWS 4
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#define N_ROWS 4
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layout(local_size_x_id = 0) in;
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#include "op_mul_mv_q_n_pre.comp"
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layout(local_size_y = 1) in;
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layout(local_size_z = 1) in;
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layout (binding = 0) readonly buffer tensorInA { uint8_t inA[]; };
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layout (binding = 1) readonly buffer tensorInB { float inB[]; };
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layout (binding = 2) writeonly buffer tensorOut { float out_[]; };
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layout (push_constant) uniform parameter {
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uint inAOff;
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uint inBOff;
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uint outOff;
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int ne00;
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int ne10;
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int ne0;
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int ne1;
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int ne01;
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int gqa;
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} pcs;
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// The q4_0 version of this function
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// The q4_0 version of this function
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float block_q_n_dot_y(uint block_index, uint yb, uint il) {
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float block_q_n_dot_y(uint block_index, uint yb, uint il) {
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@ -6,25 +6,7 @@
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#define SIZE_OF_BLOCK sizeof_block_q4_1
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#define SIZE_OF_BLOCK sizeof_block_q4_1
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#define N_ROWS 4
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#define N_ROWS 4
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layout(local_size_x_id = 0) in;
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#include "op_mul_mv_q_n_pre.comp"
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layout(local_size_y = 1) in;
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layout(local_size_z = 1) in;
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layout (binding = 0) readonly buffer tensorInA { uint8_t inA[]; };
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layout (binding = 1) readonly buffer tensorInB { float inB[]; };
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layout (binding = 2) writeonly buffer tensorOut { float out_[]; };
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layout (push_constant) uniform parameter {
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uint inAOff;
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uint inBOff;
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uint outOff;
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int ne00;
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int ne10;
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int ne0;
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int ne1;
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int ne01;
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int gqa;
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} pcs;
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// The q4_1 version of this function
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// The q4_1 version of this function
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float block_q_n_dot_y(uint block_index, uint yb, uint il) {
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float block_q_n_dot_y(uint block_index, uint yb, uint il) {
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@ -1,13 +1,20 @@
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void main() {
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void main() {
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// NB: hack to make compatible with AMD GPUs that have a subgroup size of 64
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if (gl_SubgroupInvocationID > 31)
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if (gl_SubgroupInvocationID > 31)
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return;
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return;
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const uint nb = uint(pcs.ne00/BLOCKS_IN_QUANT);
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const uint nb = uint(pcs.ne00/BLOCKS_IN_QUANT);
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const uint r0 = gl_WorkGroupID.x;
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const uint r0 = gl_WorkGroupID.x;
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const uint r1 = gl_WorkGroupID.y;
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const uint r1 = gl_WorkGroupID.y;
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const uint im = gl_WorkGroupID.z;
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const uint im = gl_WorkGroupID.z;
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const uint first_row = (r0 * gl_NumSubgroups + gl_SubgroupID) * N_ROWS;
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const uint first_row = (r0 * gl_NumSubgroups + gl_SubgroupID) * N_ROWS;
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const uint offset0 = first_row * nb + im/pcs.gqa*(nb*pcs.ne0);
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const uint i12 = im%pcs.ne12;
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const uint i13 = im/pcs.ne12;
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const uint offset0 = first_row * nb + (i12/pcs.r2)*(nb*pcs.ne01) + (i13/pcs.r3)*(nb*pcs.ne01*pcs.ne02);
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const uint x = offset0; // Based from inA without base offset
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const uint x = offset0; // Based from inA without base offset
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const uint y = r1*uint(pcs.ne10)+im*pcs.ne00*pcs.ne1+pcs.inBOff; // Based from inB
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const uint y = r1*uint(pcs.ne10)+im*pcs.ne00*pcs.ne1+pcs.inBOff; // Based from inB
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22
kompute-shaders/op_mul_mv_q_n_pre.comp
Normal file
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kompute-shaders/op_mul_mv_q_n_pre.comp
Normal file
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@ -0,0 +1,22 @@
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layout(local_size_x_id = 0) in;
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layout(local_size_y = 1) in;
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layout(local_size_z = 1) in;
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layout (binding = 0) readonly buffer tensorInA { uint8_t inA[]; };
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layout (binding = 1) readonly buffer tensorInB { float inB[]; };
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layout (binding = 2) writeonly buffer tensorOut { float out_[]; };
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layout (push_constant) uniform parameter {
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uint inAOff;
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|
uint inBOff;
|
||||||
|
uint outOff;
|
||||||
|
int ne00;
|
||||||
|
int ne01;
|
||||||
|
int ne02;
|
||||||
|
int ne10;
|
||||||
|
int ne12;
|
||||||
|
int ne0;
|
||||||
|
int ne1;
|
||||||
|
uint r2;
|
||||||
|
uint r3;
|
||||||
|
} pcs;
|
Loading…
Add table
Add a link
Reference in a new issue