ggml : add ggml_upscale_ext
(ggml/814)
* initial commit with CPU implementation of upscale to shape and test, cuda implementation next * experimental commit to see if dst shape is correct * test version * test * removed unnecessary params * refactor * fixed tests * ggml : metal impl + cleanup + sycl dev warnings * patched ggml_upscale cuda op to handle non-contiguous tensors, added test for non-contiguous behavior * metal : fix upsacle op to support nb00 + style --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
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7 changed files with 146 additions and 60 deletions
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@ -1,35 +1,36 @@
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#include "upscale.cuh"
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static __global__ void upscale_f32(const float * x, float * dst, const int ne00, const int ne00xne01, const int scale_factor) {
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// blockIdx.z: idx of ne02*ne03
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// blockIdx.y: idx of ne01*scale_factor, aka ne1
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// blockIDx.x: idx of ne00*scale_factor / BLOCK_SIZE
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// ne00xne01: ne00 * ne01
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int ne0 = ne00 * scale_factor;
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int nidx = threadIdx.x + blockIdx.x * blockDim.x;
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if (nidx >= ne0) {
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static __global__ void upscale_f32(const float * x, float * dst,
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const int nb00, const int nb01, const int nb02, const int nb03,
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const int ne10, const int ne11, const int ne12, const int ne13,
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const float sf0, const float sf1, const float sf2, const float sf3) {
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int index = threadIdx.x + blockIdx.x * blockDim.x;
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if (index >= ne10 * ne11 * ne12 * ne13) {
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return;
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}
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// operation
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int i00 = nidx / scale_factor;
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int i01 = blockIdx.y / scale_factor;
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int offset_src =
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i00 +
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i01 * ne00 +
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blockIdx.z * ne00xne01;
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int offset_dst =
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nidx +
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blockIdx.y * ne0 +
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blockIdx.z * ne0 * gridDim.y;
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dst[offset_dst] = x[offset_src];
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int i10 = index % ne10;
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int i11 = (index / ne10) % ne11;
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int i12 = (index / (ne10 * ne11)) % ne12;
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int i13 = (index / (ne10 * ne11 * ne12)) % ne13;
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int i00 = i10 / sf0;
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int i01 = i11 / sf1;
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int i02 = i12 / sf2;
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int i03 = i13 / sf3;
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dst[index] = *(float *)((char *)x + i03 * nb03 + i02 * nb02 + i01 * nb01 + i00 * nb00);
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}
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static void upscale_f32_cuda(const float * x, float * dst, const int ne00, const int ne01, const int ne02, const int ne03,
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const int scale_factor, cudaStream_t stream) {
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int ne0 = (ne00 * scale_factor);
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int num_blocks = (ne0 + CUDA_UPSCALE_BLOCK_SIZE - 1) / CUDA_UPSCALE_BLOCK_SIZE;
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dim3 gridDim(num_blocks, (ne01 * scale_factor), ne02*ne03);
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upscale_f32<<<gridDim, CUDA_UPSCALE_BLOCK_SIZE, 0, stream>>>(x, dst, ne00, ne00 * ne01, scale_factor);
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static void upscale_f32_cuda(const float * x, float * dst,
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const int nb00, const int nb01, const int nb02, const int nb03,
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const int ne10, const int ne11, const int ne12, const int ne13,
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const float sf0, const float sf1, const float sf2, const float sf3,
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cudaStream_t stream) {
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int dst_size = ne10 * ne11 * ne12 * ne13;
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int num_blocks = (dst_size + CUDA_UPSCALE_BLOCK_SIZE - 1) / CUDA_UPSCALE_BLOCK_SIZE;
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upscale_f32<<<num_blocks, CUDA_UPSCALE_BLOCK_SIZE,0,stream>>>(x, dst, nb00, nb01, nb02, nb03, ne10, ne11, ne12, ne13, sf0, sf1, sf2, sf3);
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}
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void ggml_cuda_op_upscale(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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@ -39,10 +40,12 @@ void ggml_cuda_op_upscale(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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cudaStream_t stream = ctx.stream();
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT(dst->type == GGML_TYPE_F32);
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GGML_ASSERT(src0->ne[3] == 1 && dst->ne[3] == 1); // just 3D tensors
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GGML_ASSERT( dst->type == GGML_TYPE_F32);
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const int scale_factor = dst->op_params[0];
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const float sf0 = (float)dst->ne[0]/src0->ne[0];
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const float sf1 = (float)dst->ne[1]/src0->ne[1];
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const float sf2 = (float)dst->ne[2]/src0->ne[2];
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const float sf3 = (float)dst->ne[3]/src0->ne[3];
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upscale_f32_cuda(src0_d, dst_d, src0->ne[0], src0->ne[1], src0->ne[2], src0->ne[3], scale_factor, stream);
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upscale_f32_cuda(src0_d, dst_d, src0->nb[0], src0->nb[1], src0->nb[2], src0->nb[3], dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3], sf0, sf1, sf2, sf3, stream);
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}
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