IQ1_M: 1.75 bpw quantization (#6302)
* iq1_m: basics * iq1_m: basics-2 * iq1_m: CUDA dequantize works Very 1st shot I get PPL = 9.76 for LLaMA-v2-7B. * iq1_m: separate shifts for each group of 8 in a block We get PPL(LLaMA-v2-7B ) = 9.2810 PPL(LLaMA-v2-13B) = 6.8105 Not bad, but slightly higher than sqrt(PPL(IQ1_S) * PPL(IQ2_XXS)) which is the expected outcome given that IQ1_M is halfway between IQ1_S and IQ2_XXS in terms of bpw. From this, we would expect PPL = 9.14 for LLaMA-v2-7B PPL = 6.63 for LLaMA-v2-13B * iq1_m: go to 3-bit scales There is slight increase in PPL, but the 0.0625 bpw reduction in size is totally worth it. We now have PPL(LLaMA-v2-7B ) = 9.4469 at 1.96 bpw PPL(LLaMA-v2-13B) = 6.8717 at 1.93 bpw PPL(LLaMA-v2-70B) = 4.8568 at 1.85 bpw * iq1_m: scalar dot product * iq1_m: AVX2 dot product * iq1_m: very slightly faster AVX2 dot product * iq1_m: ARM_NEON dot product Works, but very slow (10.5 t/s) * iq1_m: Metal - dequantize works, dot product does not * iq1_m: Metal now works About the same performance as iq1_s. * iq1_m: minor * iq1_m: checking pure iq1_m quantization It is pretty bad: PPL(LLaMA-v2-7B) = 34 if we quantize output.weight with Q4_K. * iiq1_m: slightly faster ARM_NEON dot product 10.5 t/s -> 11.65 t/s * iq1_m: faster ARM_NEON dot product 11.65 t/s -> 14.9 t/s * iq1_m: another minor ARM_NEON dot product improvement 14.9 -> 15.0 t/s * iq1_m: small PPL improvement via super-block scale adjustment After quantizing block scales redo the super-block scale fit. PPL(LLaMA-v2-7B ) = 9.3346 PPL(LLaMA-v2-13B) = 6.8419 PPL(LLaMA-v2-70B) = 4.8294 PPL(Mistral-7B ) = 8.1624 * iq1_m: adapt to CUDA refactoring * iq1_m: remove unused variable We have progressed to warnings being errors. * iq1_m: add to backend-ops tests * iq1_m: fix Windows ARM * iq1_m: use common definition of iq1m_scale_t * cuda: assert -> NO_DEVICE_CODE * iq1_M: PR comments --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
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16 changed files with 1006 additions and 125 deletions
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@ -373,7 +373,7 @@ static __global__ void dequantize_block_iq2_xxs(const void * __restrict__ vx, ds
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const uint8_t signs = ksigns_iq2xs[(aux32 >> 7*il) & 127];
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for (int j = 0; j < 8; ++j) y[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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@ -395,7 +395,7 @@ static __global__ void dequantize_block_iq2_xs(const void * __restrict__ vx, dst
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const uint8_t signs = ksigns_iq2xs[q2[il] >> 9];
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for (int j = 0; j < 8; ++j) y[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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@ -416,7 +416,7 @@ static __global__ void dequantize_block_iq2_s(const void * __restrict__ vx, dst_
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const uint8_t signs = x[i].qs[QK_K/8+4*ib+il];
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for (int j = 0; j < 8; ++j) y[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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@ -444,7 +444,7 @@ static __global__ void dequantize_block_iq3_xxs(const void * __restrict__ vx, ds
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y[j+4] = d * grid2[j] * (signs & kmask_iq2xs[j+4] ? -1.f : 1.f);
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}
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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@ -470,7 +470,7 @@ static __global__ void dequantize_block_iq3_s(const void * __restrict__ vx, dst_
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y[j+4] = d * grid2[j] * (signs & kmask_iq2xs[j+4] ? -1.f : 1.f);
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}
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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@ -496,11 +496,42 @@ static __global__ void dequantize_block_iq1_s(const void * __restrict__ vx, dst_
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y[j] = d * (q[j] + delta);
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}
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#else
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assert(false);
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NO_DEVICE_CODE;
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#endif
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}
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template<typename dst_t>
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static __global__ void dequantize_block_iq1_m(const void * __restrict__ vx, dst_t * __restrict__ yy) {
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const int i = blockIdx.x;
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const block_iq1_m * x = (const block_iq1_m *) vx;
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const int tid = threadIdx.x;
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#if QK_K == 256
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const int il = tid/8; // 0...3
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const int ib = tid%8; // 0...7
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dst_t * y = yy + i*QK_K + 32*ib + 8*il;
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const uint16_t * sc = (const uint16_t *)x[i].scales;
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iq1m_scale_t scale;
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scale.u16 = (sc[0] >> 12) | ((sc[1] >> 8) & 0x00f0) | ((sc[2] >> 4) & 0x0f00) | (sc[3] & 0xf000);
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const int ib16 = 2*ib + il/2; // sc[ib16/4] >> 3*(ib16%4) -> sc[ib/2] >> 3*((2*ib+il/2)%4);
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const float d = (float)scale.f16 * (2*((sc[ib16/4] >> 3*(ib16%4)) & 0x7) + 1);
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const float delta = x[i].qh[2*ib+il/2] & (0x08 << 4*(il%2)) ? -1 - IQ1M_DELTA : -1 + IQ1M_DELTA;
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uint32_t grid32[2]; const int8_t * q = (const int8_t *)grid32;
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grid32[0] = iq1s_grid_gpu[x[i].qs[4*ib+il] | (((x[i].qh[2*ib+il/2] >> 4*(il%2)) & 7) << 8)];
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grid32[1] = (grid32[0] >> 4) & 0x0f0f0f0f;
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grid32[0] &= 0x0f0f0f0f;
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for (int j = 0; j < 8; ++j) {
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y[j] = d * (q[j] + delta);
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}
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#else
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NO_DEVICE_CODE;
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#endif
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}
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template<typename dst_t>
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static __global__ void dequantize_block_iq4_nl(const void * __restrict__ vx, dst_t * __restrict__ yy) {
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@ -658,6 +689,12 @@ static void dequantize_row_iq4_nl_cuda(const void * vx, dst_t * y, const int k,
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dequantize_block_iq4_nl<<<nb, 32, 0, stream>>>(vx, y);
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}
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template<typename dst_t>
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static void dequantize_row_iq1_m_cuda(const void * vx, dst_t * y, const int k, cudaStream_t stream) {
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const int nb = k / QK_K;
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dequantize_block_iq1_m<<<nb, 32, 0, stream>>>(vx, y);
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}
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template<typename dst_t>
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static void dequantize_row_iq4_xs_cuda(const void * vx, dst_t * y, const int k, cudaStream_t stream) {
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const int nb = (k + QK_K - 1) / QK_K;
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@ -724,6 +761,8 @@ to_fp16_cuda_t ggml_get_to_fp16_cuda(ggml_type type) {
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return dequantize_row_iq3_xxs_cuda;
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case GGML_TYPE_IQ1_S:
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return dequantize_row_iq1_s_cuda;
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case GGML_TYPE_IQ1_M:
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return dequantize_row_iq1_m_cuda;
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case GGML_TYPE_IQ4_NL:
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return dequantize_row_iq4_nl_cuda;
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case GGML_TYPE_IQ4_XS:
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@ -769,6 +808,8 @@ to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
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return dequantize_row_iq3_xxs_cuda;
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case GGML_TYPE_IQ1_S:
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return dequantize_row_iq1_s_cuda;
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case GGML_TYPE_IQ1_M:
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return dequantize_row_iq1_m_cuda;
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case GGML_TYPE_IQ4_NL:
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return dequantize_row_iq4_nl_cuda;
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case GGML_TYPE_IQ4_XS:
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