CUDA: faster softmax via shared memory + fp16 math
This commit is contained in:
JohannesGaessler
parent
540938f890
commit
64c46fc6f5
2 changed files with 288 additions and 27 deletions
311
ggml-cuda.cu
311
ggml-cuda.cu
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@ -116,6 +116,7 @@
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#include "ggml.h"
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#include "ggml-backend-impl.h"
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#define CC_PASCAL 600
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#define MIN_CC_DP4A 610 // minimum compute capability for __dp4a, an intrinsic for byte-wise dot products
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#define CC_VOLTA 700
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#define CC_OFFSET_AMD 1000000
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@ -585,6 +586,19 @@ static __device__ __forceinline__ float2 warp_reduce_sum(float2 a) {
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return a;
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}
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static __device__ __forceinline__ half2 warp_reduce_sum(half2 a) {
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#if __CUDA_ARCH__ < CC_PASCAL || (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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(void) a;
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bad_arch();
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#else
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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a = __hadd2(a, __shfl_xor_sync(0xffffffff, a, mask, 32));
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}
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return a;
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#endif // __CUDA_ARCH__ < CC_PASCAL || (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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}
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static __device__ __forceinline__ float warp_reduce_max(float x) {
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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@ -593,6 +607,19 @@ static __device__ __forceinline__ float warp_reduce_max(float x) {
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return x;
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}
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static __device__ __forceinline__ half2 warp_reduce_max(half2 x) {
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#if __CUDA_ARCH__ < CC_PASCAL || (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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(void) x;
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bad_arch();
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#else
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#pragma unroll
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for (int mask = 16; mask > 0; mask >>= 1) {
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x = __hmax2(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
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}
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return x;
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#endif // __CUDA_ARCH__ < CC_PASCAL || (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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}
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static __device__ __forceinline__ float op_repeat(const float a, const float b) {
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return b;
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GGML_UNUSED(a);
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@ -5201,75 +5228,227 @@ static __global__ void diag_mask_inf_f32(const float * x, float * dst, const int
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dst[i] = x[i] - (col > n_past + row % rows_per_channel) * FLT_MAX;
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}
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static __global__ void soft_max_f32(const float * x, const float * y, float * dst, const int ncols, const int nrows_y, const float scale) {
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template <int ncols_template, int block_size_template, bool need_check>
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static __global__ void soft_max_f16(const float * x, const float * y, float * dst, const int ncols_par, const int nrows_y, const float scale) {
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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const int ncols_data = ncols_template == 0 ? ncols_par : ncols_template;
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const int ncols_smem = GGML_PAD(ncols_data/2, WARP_SIZE);
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const int tid = threadIdx.x;
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const int rowx = blockIdx.x;
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const int rowy = rowx % nrows_y; // broadcast the mask (y) in the row dimension
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const int block_size = blockDim.x;
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const int block_size = block_size_template == 0 ? blockDim.x : block_size_template;
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const int warp_id = threadIdx.x / WARP_SIZE;
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const int lane_id = threadIdx.x % WARP_SIZE;
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__shared__ float buf[CUDA_SOFT_MAX_BLOCK_SIZE/WARP_SIZE];
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extern __shared__ half2 data_soft_max_f16[];
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half2 * vals = data_soft_max_f16 + 0; // shared memory buffer to cache values between iterations
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half * buf_iw = (half *) (data_soft_max_f16 + ncols_smem); // shared memory buffer for inter-warp communication
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float max_val = -INFINITY;
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half2 max_val = make_half2(-INFINITY, -INFINITY);
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for (int col = tid; col < ncols; col += block_size) {
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const int ix = rowx*ncols + col;
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const int iy = rowy*ncols + col;
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max_val = max(max_val, x[ix]*scale + (y ? y[iy] : 0.0f));
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#pragma unroll
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for (int col0 = 0; col0 < ncols_smem; col0 += block_size) {
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const int col_smem = col0 + tid;
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const int col_data = 2*col0 + 2*WARP_SIZE*warp_id + lane_id;
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const int ix = rowx*ncols_data + col_data;
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const int iy = rowy*ncols_data + col_data;
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half2 val;
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if (need_check && col_data + 0 >= ncols_data) {
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val.x = -INFINITY;
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} else {
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val.x = x[ix + 0]*scale + (y ? y[iy + 0] : 0.0f);
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}
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if (need_check && col_data + WARP_SIZE >= ncols_data) {
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val.y = -INFINITY;
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} else {
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val.y = x[ix + WARP_SIZE]*scale + (y ? y[iy + WARP_SIZE] : 0.0f);
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}
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vals[col_smem] = val;
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max_val = __hmax2(max_val, val);
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}
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// find the max value in the block
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max_val = warp_reduce_max(max_val);
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if (block_size > WARP_SIZE) {
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if (warp_id == 0) {
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buf[lane_id] = -INFINITY;
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buf_iw[lane_id] = -INFINITY;
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}
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__syncthreads();
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if (lane_id == 0) {
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buf[warp_id] = max_val;
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buf_iw[warp_id] = __hmax(max_val.x, max_val.y);
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}
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__syncthreads();
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max_val = buf[lane_id];
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max_val = __half2half2(buf_iw[lane_id]);
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max_val = warp_reduce_max(max_val);
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} else {
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max_val = __half2half2(__hmax(max_val.x, max_val.y));
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}
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float tmp = 0.f;
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half2 tmp = make_half2(0.0f, 0.0f); // partial sums
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#pragma unroll
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for (int col0 = 0; col0 < ncols_smem; col0 += block_size) {
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const int col_smem = col0 + tid;
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if (ncols_template == 0 && col_smem >= ncols_smem) {
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break;
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}
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const half2 val = h2exp(vals[col_smem] - max_val);
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for (int col = tid; col < ncols; col += block_size) {
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const int ix = rowx*ncols + col;
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const int iy = rowy*ncols + col;
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const float val = expf((x[ix]*scale + (y ? y[iy] : 0.0f)) - max_val);
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tmp += val;
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dst[ix] = val;
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vals[col_smem] = val;
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}
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// find the sum of exps in the block
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tmp = warp_reduce_sum(tmp);
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if (block_size > WARP_SIZE) {
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if (warp_id == 0) {
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buf[lane_id] = 0.f;
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buf_iw[lane_id] = 0.0f;
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}
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__syncthreads();
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if (lane_id == 0) {
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buf[warp_id] = tmp;
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buf_iw[warp_id] = tmp.x + tmp.y;
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}
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__syncthreads();
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tmp = buf[lane_id];
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tmp = __half2half2(buf_iw[lane_id]);
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tmp = warp_reduce_sum(tmp);
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} else {
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tmp = __half2half2(tmp.x + tmp.y);
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}
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const half2 inv_sum = make_half2(1.0f, 1.0f) / tmp;
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#pragma unroll
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for (int col0 = 0; col0 < ncols_smem; col0 += block_size) {
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const int col_smem = col0 + tid;
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const int col_data = 2*col0 + 2*WARP_SIZE*warp_id + lane_id;
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const int idst = rowx*ncols_data + col_data;
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const half2 result = vals[col_smem] * inv_sum;
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if (need_check && col_data + 0 >= ncols_data) {
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return;
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}
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dst[idst] = result.x;
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if (need_check && col_data + WARP_SIZE >= ncols_data) {
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return;
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}
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dst[idst + WARP_SIZE] = result.y;
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}
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#else
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(void) x; (void) y; (void) dst; (void) ncols_par; (void) nrows_y; (void) scale;
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bad_arch();
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
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}
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template <int ncols_template, int block_size_template>
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static __global__ void soft_max_f32(const float * x, const float * y, float * dst, const int ncols_par, const int nrows_y, const float scale) {
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const int ncols = ncols_template == 0 ? ncols_par : ncols_template;
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const int tid = threadIdx.x;
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const int rowx = blockIdx.x;
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const int rowy = rowx % nrows_y; // broadcast the mask (y) in the row dimension
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const int block_size = block_size_template == 0 ? blockDim.x : block_size_template;
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const int warp_id = threadIdx.x / WARP_SIZE;
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const int lane_id = threadIdx.x % WARP_SIZE;
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extern __shared__ float data_soft_max_f32[];
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float * vals = data_soft_max_f32 + 0; // shared memory buffer to cache values between iterations
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float * buf_iw = data_soft_max_f32 + ncols; // shared memory buffer for inter-warp communication
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float max_val = -INFINITY;
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#pragma unroll
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for (int col0 = 0; col0 < ncols; col0 += block_size) {
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const int col = col0 + tid;
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if (ncols_template == 0 && col >= ncols) {
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break;
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}
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const int ix = rowx*ncols + col;
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const int iy = rowy*ncols + col;
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const float val = x[ix]*scale + (y ? y[iy] : 0.0f);
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vals[col] = val;
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max_val = max(max_val, val);
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}
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// find the max value in the block
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max_val = warp_reduce_max(max_val);
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if (block_size > WARP_SIZE) {
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if (warp_id == 0) {
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buf_iw[lane_id] = -INFINITY;
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}
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__syncthreads();
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if (lane_id == 0) {
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buf_iw[warp_id] = max_val;
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}
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__syncthreads();
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max_val = buf_iw[lane_id];
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max_val = warp_reduce_max(max_val);
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}
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float tmp = 0.0f; // partial sum
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#pragma unroll
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for (int col0 = 0; col0 < ncols; col0 += block_size) {
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const int col = col0 + tid;
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if (ncols_template == 0 && col >= ncols) {
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break;
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}
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const float val = expf(vals[col] - max_val);
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tmp += val;
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vals[col] = val;
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}
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// find the sum of exps in the block
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tmp = warp_reduce_sum(tmp);
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if (block_size > WARP_SIZE) {
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if (warp_id == 0) {
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buf_iw[lane_id] = 0.0f;
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}
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__syncthreads();
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if (lane_id == 0) {
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buf_iw[warp_id] = tmp;
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}
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__syncthreads();
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tmp = buf_iw[lane_id];
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tmp = warp_reduce_sum(tmp);
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}
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const float inv_tmp = 1.f / tmp;
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const float inv_sum = 1.0f / tmp;
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for (int col = tid; col < ncols; col += block_size) {
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const int i = rowx*ncols + col;
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dst[i] *= inv_tmp;
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#pragma unroll
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for (int col0 = 0; col0 < ncols; col0 += block_size) {
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const int col = col0 + tid;
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if (ncols_template == 0 && col >= ncols) {
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return;
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}
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const int idst = rowx*ncols + col;
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dst[idst] = vals[col] * inv_sum;
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}
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}
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@ -6543,12 +6722,80 @@ static void diag_mask_inf_f32_cuda(const float * x, float * dst, const int ncols
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diag_mask_inf_f32<<<block_nums, block_dims, 0, stream>>>(x, dst, ncols_x, rows_per_channel, n_past);
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}
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static void soft_max_f16_cuda(const float * x, const float * y, float * dst, const int ncols_x, const int nrows_x, const int nrows_y, const float scale, cudaStream_t stream) {
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int nth = WARP_SIZE;
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while (nth < ncols_x/2 && nth < CUDA_SOFT_MAX_BLOCK_SIZE) nth *= 2;
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const dim3 block_dims(nth, 1, 1);
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const dim3 block_nums(nrows_x, 1, 1);
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const int64_t shmem = (ncols_x + WARP_SIZE)*sizeof(half);
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static_assert(CUDA_SOFT_MAX_BLOCK_SIZE == 1024, "These values need to be adjusted.");
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switch (ncols_x) {
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case 32:
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soft_max_f16<32, 32, true><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 64:
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soft_max_f16<64, 32, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 128:
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soft_max_f16<128, 64, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 256:
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soft_max_f16<256, 128, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 512:
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soft_max_f16<512, 256, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 1024:
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soft_max_f16<1024, 512, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 2048:
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soft_max_f16<2048, 1024, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 4096:
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soft_max_f16<4096, 1024, false><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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default:
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soft_max_f16<0, 0, true><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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}
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}
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static void soft_max_f32_cuda(const float * x, const float * y, float * dst, const int ncols_x, const int nrows_x, const int nrows_y, const float scale, cudaStream_t stream) {
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int nth = WARP_SIZE;
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while (nth < ncols_x && nth < CUDA_SOFT_MAX_BLOCK_SIZE) nth *= 2;
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const dim3 block_dims(nth, 1, 1);
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const dim3 block_nums(nrows_x, 1, 1);
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soft_max_f32<<<block_nums, block_dims, 0, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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const int64_t shmem = (ncols_x + WARP_SIZE)*sizeof(float);
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static_assert(CUDA_SOFT_MAX_BLOCK_SIZE == 1024, "These values need to be adjusted.");
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switch (ncols_x) {
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case 32:
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soft_max_f32<32, 32><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 64:
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soft_max_f32<64, 64><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 128:
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soft_max_f32<128, 128><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 256:
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soft_max_f32<256, 256><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 512:
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soft_max_f32<512, 512><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 1024:
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soft_max_f32<1024, 1024><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 2048:
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soft_max_f32<2048, 1024><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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case 4096:
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soft_max_f32<4096, 1024><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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default:
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soft_max_f32<0, 0><<<block_nums, block_dims, shmem, stream>>>(x, y, dst, ncols_x, nrows_y, scale);
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break;
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}
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}
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static void im2col_f32_f16_cuda(const float* x, half* dst,
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@ -7873,7 +8120,21 @@ static void ggml_cuda_op_soft_max(
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float scale = 1.0f;
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memcpy(&scale, dst->op_params, sizeof(float));
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#if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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const bool use_f16_soft_max = false;
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#else
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#ifdef GGML_CUDA_F16
|
||||
const bool use_f16_soft_max = true;
|
||||
#else
|
||||
const bool use_f16_soft_max = false;
|
||||
#endif // GGML_CUDA_F16
|
||||
#endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
|
||||
|
||||
if (use_f16_soft_max) {
|
||||
soft_max_f16_cuda(src0_dd, src1 ? src1_dd : nullptr, dst_dd, ne00, nrows_x, nrows_y, scale, main_stream);
|
||||
} else {
|
||||
soft_max_f32_cuda(src0_dd, src1 ? src1_dd : nullptr, dst_dd, ne00, nrows_x, nrows_y, scale, main_stream);
|
||||
}
|
||||
|
||||
(void) dst;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -436,7 +436,7 @@ struct test_case {
|
|||
|
||||
double err = nmse(f1.data(), f2.data(), f1.size());
|
||||
if (err > ud->max_err) {
|
||||
printf("[%s] NMSE = %f ", ggml_op_desc(t1), err);
|
||||
printf("[%s] NMSE = %.3E > %.3E ", ggml_op_desc(t1), err, ud->max_err);
|
||||
//for (int i = 0; i < (int) f1.size(); i++) {
|
||||
// printf("%5d %9.6f %9.6f, diff = %9.6f\n", i, f1[i], f2[i], f1[i] - f2[i]);
|
||||
//}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue