delete unused commnet
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@ -175,146 +175,3 @@ void ggml_cuda_op_ssm_scan(ggml_backend_cuda_context &ctx, ggml_tensor *dst) {
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src3->nb[1], src4->nb[1], src4->nb[2], src5->nb[1],
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src5->nb[2], dst_d, nc, nr, n_t, n_s, stream);
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}
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// #include "ssm_scan.cuh"
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// template <int block_size>
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// static __global__ void ssm_scan_f32(
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// const float *__restrict__ src0, const float *__restrict__ src1,
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// const float *__restrict__ src2, const float *__restrict__ src3,
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// const float *__restrict__ src4, const float *__restrict__ src5,
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// const int src0_nb1, const int src0_nb2, const int src1_nb0,
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// const int src1_nb1, const int src1_nb2, const int src1_nb3,
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// const int src2_nb0, const int src2_nb1, const int src2_nb2,
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// const int src3_nb1, const int src4_nb1, const int src4_nb2,
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// const int src5_nb1, const int src5_nb2, float *__restrict__ dst,
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// const int nc, const int nr, const int n_t, const int n_s) {
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// // const int row = blockIdx.x*blockDim.y + threadIdx.y;
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// const int tid = threadIdx.x;
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// const int i3 = threadIdx.y;
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// const int ith = tid;
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// const int nth = WARP_SIZE;
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// // rows per thread
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// const int dr = (nr + nth - 1) / nth;
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// // row range for this thread
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// const int ir0 = dr * ith;
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// const int ir1 = min(ir0 + dr, nr);
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// const int ir = ir1 - ir0;
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// for (int i2 = 0; i2 < n_t; ++i2) {
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// const float *s0 =
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// (const float *)((const char *)src0 + ir0 * src0_nb1 +
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// i3 * src0_nb2); // {d_state, d_inner, n_s}
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// const float *x =
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// (const float *)((const char *)src1 + ir0 * src1_nb0 + i2 * src1_nb1 +
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// i3 * src1_nb2); // {d_inner, n_t, n_s}
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// const float *dt =
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// (const float *)((const char *)src2 + ir0 * src2_nb0 + i2 * src2_nb1 +
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// i3 * src2_nb2); // {d_inner, n_t, n_s}
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// const float *A = (const float *)((const char *)src3 +
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// ir0 * src3_nb1); // {d_state, d_inner}
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// const float *B = (const float *)((const char *)src4 + i2 * src4_nb1 +
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// i3 * src4_nb2); // {d_state, n_t, n_s}
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// const float *C = (const float *)((const char *)src5 + i2 * src5_nb1 +
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// i3 * src5_nb2); // {d_state, n_t, n_s}
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// float *y = (float *)((char *)dst + ir0 * src1_nb0 + i2 * src1_nb1 +
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// i3 * src1_nb2); // {d_inner, n_t, n_s}
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// float *s = (float *)((char *)dst + ir0 * src0_nb1 + i3 * src0_nb2 +
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// src1_nb3); // {d_state, d_inner, n_s}
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// // use the output as the source for the next token-wise iterations
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// if (i2 > 0) {
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// s0 = s;
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// }
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// // d_inner
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// for (int i1 = 0; i1 < ir; ++i1) {
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// // ref:
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// //
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// https://github.com/state-spaces/mamba/blob/34076d664838588a3c97727b263478ab9f621a07/mamba_ssm/ops/triton/selective_state_update.py#L78
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// float dt_soft_plus = dt[i1] <= 20.0f ? log1pf(expf(dt[i1])) : dt[i1];
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// float x_dt = x[i1] * dt_soft_plus;
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// float sumf = 0.0f;
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// // d_state
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// #pragma unroll
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// for (int i0 = 0; i0 < nc; ++i0) {
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// int i = i0 + i1 * nc;
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// // state = prev_state * dA + dB * x
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// float state = (s0[i] * expf(dt_soft_plus * A[i])) + (B[i0] * x_dt);
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// // y = rowwise_dotprod(state, C)
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// sumf += state * C[i0];
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// s[i] = state;
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// }
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// y[i1] = sumf;
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// }
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// }
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// }
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// static void ssm_scan_f32_cuda(
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// const float *src0, const float *src1, const float *src2, const float
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// *src3, const float *src4, const float *src5, const int src0_nb1, const
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// int src0_nb2, const int src1_nb0, const int src1_nb1, const int src1_nb2,
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// const int src1_nb3, const int src2_nb0, const int src2_nb1, const int
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// src2_nb2, const int src3_nb1, const int src4_nb1, const int src4_nb2,
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// const int src5_nb1, const int src5_nb2, float *dst, const int nc, const
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// int nr, const int n_t, const int n_s, cudaStream_t stream) {
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// const dim3 block_dims(WARP_SIZE, n_s, 1);
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// const int nblocks = 1; // TODO
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// ssm_scan_f32<WARP_SIZE><<<nblocks, block_dims, 0, stream>>>(
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// src0, src1, src2, src3, src4, src5, src0_nb1, src0_nb2, src1_nb0,
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// src1_nb1, src1_nb2, src1_nb3, src2_nb0, src2_nb1, src2_nb2, src3_nb1,
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// src4_nb1, src4_nb2, src5_nb1, src5_nb2, dst, nc, nr, n_t, n_s);
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// }
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// void ggml_cuda_op_ssm_scan(ggml_backend_cuda_context &ctx, ggml_tensor *dst)
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// {
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// const struct ggml_tensor *src0 = dst->src[0]; // s
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// const struct ggml_tensor *src1 = dst->src[1]; // x
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// const struct ggml_tensor *src2 = dst->src[2]; // dt
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// const struct ggml_tensor *src3 = dst->src[3]; // A
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// const struct ggml_tensor *src4 = dst->src[4]; // B
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// const struct ggml_tensor *src5 = dst->src[5]; // C
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// const int64_t nc = src0->ne[0]; // d_state
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// const int64_t nr = src0->ne[1]; // d_inner
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// const int64_t n_t = src1->ne[1]; // number of tokens per sequence
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// const int64_t n_s = src0->ne[2]; // number of sequences in the batch
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// GGML_ASSERT(ggml_nelements(src1) + ggml_nelements(src0) ==
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// ggml_nelements(dst));
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// GGML_ASSERT(src0->nb[0] == sizeof(float));
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// GGML_ASSERT(src1->nb[0] == sizeof(float));
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// GGML_ASSERT(src2->nb[0] == sizeof(float));
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// GGML_ASSERT(src3->nb[0] == sizeof(float));
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// GGML_ASSERT(src4->nb[0] == sizeof(float));
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// GGML_ASSERT(src5->nb[0] == sizeof(float));
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// // required for the dot product between s and C
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// GGML_ASSERT(src0->nb[1] == src0->ne[0] * sizeof(float));
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// // required for per-sequence offsets for states
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// GGML_ASSERT(src0->nb[2] == src0->ne[0] * src0->ne[1] * sizeof(float));
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// // required to get correct offset for state destination (i.e. src1->nb[3])
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// GGML_ASSERT(src1->nb[3] ==
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// src1->ne[0] * src1->ne[1] * src1->ne[2] * sizeof(float));
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// const float *src0_d = (const float *)src0->data;
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// const float *src1_d = (const float *)src1->data;
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// const float *src2_d = (const float *)src2->data;
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// const float *src3_d = (const float *)src3->data;
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// const float *src4_d = (const float *)src4->data;
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// const float *src5_d = (const float *)src5->data;
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// float *dst_d = (float *)dst->data;
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// cudaStream_t stream = ctx.stream();
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// GGML_ASSERT(src0->type == GGML_TYPE_F32);
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// GGML_ASSERT(dst->type == GGML_TYPE_F32);
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// ssm_scan_f32_cuda(src0_d, src1_d, src2_d, src3_d, src4_d, src5_d,
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// src0->nb[1],
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// src0->nb[2], src1->nb[0], src1->nb[1], src1->nb[2],
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// src1->nb[3], src2->nb[0], src2->nb[1], src2->nb[2],
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// src3->nb[1], src4->nb[1], src4->nb[2], src5->nb[1],
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// src5->nb[2], dst_d, nc, nr, n_t, n_s, stream);
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// }
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