CUDA: faster q2_K, q3_K MMQ + int8 tensor cores (#7921)
* CUDA: faster q2_K, q3_K MMQ + int8 tensor cores * try CI fix * try CI fix * try CI fix * fix data race * rever q2_K precision related changes
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6 changed files with 468 additions and 330 deletions
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@ -265,36 +265,31 @@ static __device__ __forceinline__ float vec_dot_q2_K_q8_1_impl_mmvq(
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// contiguous u/y values
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static __device__ __forceinline__ float vec_dot_q2_K_q8_1_impl_mmq(
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const int * __restrict__ v, const int * __restrict__ u, const uint8_t * __restrict__ scales,
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const half2 & dm2, const float & d8) {
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const int * __restrict__ v, const int * __restrict__ u, const half2 * dm2, const float & d8) {
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#if __CUDA_ARCH__ >= MIN_CC_DP4A // lowest compute capability for integer intrinsics
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int sumi_d = 0;
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int sumi_m = 0;
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float sumf_d = 0.0f;
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float sumf_m = 0.0f;
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#pragma unroll
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for (int i0 = 0; i0 < QI8_1; i0 += QI8_1/2) {
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int sumi_d_sc = 0;
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const int sc = scales[i0 / (QI8_1/2)];
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// fill int with 4x m
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int m = sc >> 4;
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m |= m << 8;
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m |= m << 16;
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const float2 dm2f = __half22float2(dm2[i0/(QI8_1/2)]);
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int sumi_d = 0;
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int sumi_m = 0;
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const int vi0 = v[i0/(QI8_1/2)];
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#pragma unroll
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for (int i = i0; i < i0 + QI8_1/2; ++i) {
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sumi_d_sc = __dp4a(v[i], u[i], sumi_d_sc); // SIMD dot product
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sumi_m = __dp4a(m, u[i], sumi_m); // multiply sum of q8_1 values with m
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const int vi = (vi0 >> (2*(i % (QI8_1/2)))) & 0x03030303;
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sumi_d = __dp4a(vi, u[i], sumi_d); // SIMD dot product
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sumi_m = __dp4a(0x01010101, u[i], sumi_m);
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}
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sumi_d += sumi_d_sc * (sc & 0xF);
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sumf_d += dm2f.x * sumi_d;
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sumf_m += dm2f.y * sumi_m;
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}
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const float2 dm2f = __half22float2(dm2);
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return d8 * (dm2f.x*sumi_d - dm2f.y*sumi_m);
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return d8*(sumf_d - sumf_m);
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#else
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NO_DEVICE_CODE;
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#endif // __CUDA_ARCH__ >= MIN_CC_DP4A
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@ -352,8 +347,10 @@ static __device__ __forceinline__ float vec_dot_q3_K_q8_1_impl_mmq(
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for (int i0 = 0; i0 < QR3_K*VDR_Q3_K_Q8_1_MMQ; i0 += QI8_1/2) {
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int sumi_sc = 0;
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#pragma unroll
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for (int i = i0; i < i0 + QI8_1/2; ++i) {
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sumi_sc = __dp4a(v[i], u[i], sumi_sc); // SIMD dot product
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const int vi = __vsubss4((v[i/2] >> (4*(i%2))) & 0x0F0F0F0F, 0x04040404);
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sumi_sc = __dp4a(vi, u[i], sumi_sc); // SIMD dot product
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}
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sumi += sumi_sc * scales[i0 / (QI8_1/2)];
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