ggml: apply the unpad operator patch
Signed-off-by: YiYing He <yiying@secondstate.io>
This commit is contained in:
parent
45a89e0cec
commit
8bb33d3285
8 changed files with 220 additions and 2 deletions
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@ -487,6 +487,7 @@ extern "C" {
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GGML_OP_UPSCALE, // nearest interpolate
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GGML_OP_PAD,
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GGML_OP_PAD_REFLECT_1D,
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GGML_OP_UNPAD,
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GGML_OP_ARANGE,
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GGML_OP_TIMESTEP_EMBEDDING,
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GGML_OP_ARGSORT,
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@ -1743,6 +1744,15 @@ extern "C" {
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int p0,
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int p1);
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// unpad each dimension: [x, ..., x, y, ..., y] -> [x, ..., x]
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GGML_API struct ggml_tensor * ggml_unpad(
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struct ggml_context * ctx,
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struct ggml_tensor * a,
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int p0,
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int p1,
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int p2,
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int p3);
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// Ref: https://github.com/CompVis/stable-diffusion/blob/main/ldm/modules/diffusionmodules/util.py#L151
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// timesteps: [N,]
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// return: [N, dim]
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@ -10660,6 +10660,59 @@ static void ggml_compute_forward_pad_reflect_1d(
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}
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}
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static void ggml_compute_forward_unpad_f32(
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const struct ggml_compute_params *params,
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struct ggml_tensor *dst) {
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const struct ggml_tensor * src0 = dst->src[0];
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GGML_ASSERT(src0->nb[0] == sizeof(float));
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GGML_ASSERT( dst->nb[0] == sizeof(float));
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const int ith = params->ith;
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const int nth = params->nth;
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GGML_TENSOR_UNARY_OP_LOCALS
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float * dst_ptr = (float *) dst->data;
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// TODO: optimize
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for (int64_t i2 = 0; i2 < ne2; ++i2) {
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for (int64_t i1 = ith; i1 < ne1; i1 += nth) {
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for (int64_t i0 = 0; i0 < ne0; ++i0) {
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for (int64_t i3 = 0; i3 < ne3; ++i3) {
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const int64_t dst_idx = i3*(ne0*ne1*ne2) + i2*(ne0*ne1) + i1*ne0 + i0;
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const float * src_ptr = (const float *)((char *) src0->data + i3*nb03 + i2*nb02 + i1*nb01 + i0*nb00);
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if (i0 < ne00 && i1 < ne01 && i2 < ne02 && i3 < ne03) {
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dst_ptr[dst_idx] = *src_ptr;
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}
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}
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}
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}
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}
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}
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static void ggml_compute_forward_unpad(
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const struct ggml_compute_params * params,
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struct ggml_tensor * dst) {
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const struct ggml_tensor * src0 = dst->src[0];
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switch (src0->type) {
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case GGML_TYPE_F32:
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{
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ggml_compute_forward_unpad_f32(params, dst);
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} break;
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default:
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{
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GGML_ABORT("fatal error");
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}
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}
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}
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// ggml_compute_forward_arange
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static void ggml_compute_forward_arange_f32(
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@ -12953,6 +13006,10 @@ static void ggml_compute_forward(struct ggml_compute_params * params, struct ggm
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{
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ggml_compute_forward_pad_reflect_1d(params, tensor);
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} break;
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case GGML_OP_UNPAD:
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{
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ggml_compute_forward_unpad(params, tensor);
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} break;
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case GGML_OP_ARANGE:
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{
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ggml_compute_forward_arange(params, tensor);
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@ -13300,6 +13357,7 @@ static int ggml_get_n_tasks(struct ggml_tensor * node, int n_threads) {
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case GGML_OP_UPSCALE:
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case GGML_OP_PAD:
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case GGML_OP_PAD_REFLECT_1D:
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case GGML_OP_UNPAD:
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case GGML_OP_ARANGE:
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case GGML_OP_TIMESTEP_EMBEDDING:
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case GGML_OP_ARGSORT:
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@ -2196,6 +2196,9 @@ static bool ggml_cuda_compute_forward(ggml_backend_cuda_context & ctx, struct gg
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case GGML_OP_PAD:
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ggml_cuda_op_pad(ctx, dst);
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break;
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case GGML_OP_UNPAD:
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ggml_cuda_op_unpad(ctx, dst);
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break;
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case GGML_OP_ARANGE:
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ggml_cuda_op_arange(ctx, dst);
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break;
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@ -3184,6 +3187,7 @@ static bool ggml_backend_cuda_device_supports_op(ggml_backend_dev_t dev, const g
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case GGML_OP_GROUP_NORM:
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case GGML_OP_UPSCALE:
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case GGML_OP_PAD:
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case GGML_OP_UNPAD:
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case GGML_OP_ARANGE:
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case GGML_OP_TIMESTEP_EMBEDDING:
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case GGML_OP_LEAKY_RELU:
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@ -47,3 +47,49 @@ void ggml_cuda_op_pad(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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src0->ne[0], src0->ne[1], src0->ne[2], src0->ne[3],
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dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3], stream);
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}
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static __global__ void unpad_f32(const float * x, float * dst, const int ne0, const int ne00, const int ne01, const int ne02, const int ne03) {
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// blockIdx.z: idx of ne2*ne3, aka ne02*ne03
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// blockIdx.y: idx of ne1
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// blockIDx.x: idx of ne0 / BLOCK_SIZE
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int nidx = threadIdx.x + blockIdx.x * blockDim.x;
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if (nidx >= ne0) {
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return;
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}
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// operation
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int offset_dst =
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nidx +
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blockIdx.y * ne0 +
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blockIdx.z * ne0 * gridDim.y;
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if (nidx < ne00 && blockIdx.y < ne01 && blockIdx.z < ne02*ne03) {
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int offset_src =
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nidx +
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blockIdx.y * ne00 +
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blockIdx.z * ne00 * ne01;
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dst[offset_dst] = x[offset_src];
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}
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}
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static void unpad_f32_cuda(const float * x, float * dst,
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const int ne00, const int ne01, const int ne02, const int ne03,
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const int ne0, const int ne1, const int ne2, const int ne3, cudaStream_t stream) {
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int num_blocks = (ne0 + CUDA_PAD_BLOCK_SIZE - 1) / CUDA_PAD_BLOCK_SIZE;
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dim3 gridDim(num_blocks, ne1, ne2*ne3);
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unpad_f32<<<gridDim, CUDA_PAD_BLOCK_SIZE, 0, stream>>>(x, dst, ne0, ne00, ne01, ne02, ne03);
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}
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void ggml_cuda_op_unpad(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * src0 = dst->src[0];
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const float * src0_d = (const float *)src0->data;
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float * dst_d = (float *)dst->data;
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cudaStream_t stream = ctx.stream();
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT(dst->type == GGML_TYPE_F32);
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GGML_ASSERT(src0->ne[3] == 1 && dst->ne[3] == 1); // just 3D tensors
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unpad_f32_cuda(src0_d, dst_d,
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src0->ne[0], src0->ne[1], src0->ne[2], src0->ne[3],
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dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3], stream);
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}
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@ -3,3 +3,4 @@
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#define CUDA_PAD_BLOCK_SIZE 256
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void ggml_cuda_op_pad(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_unpad(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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@ -324,6 +324,7 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_UPSCALE_F32,
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GGML_METAL_KERNEL_TYPE_PAD_F32,
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GGML_METAL_KERNEL_TYPE_PAD_REFLECT_1D_F32,
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GGML_METAL_KERNEL_TYPE_UNPAD_F32,
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GGML_METAL_KERNEL_TYPE_ARANGE_F32,
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GGML_METAL_KERNEL_TYPE_TIMESTEP_EMBEDDING_F32,
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GGML_METAL_KERNEL_TYPE_ARGSORT_F32_I32_ASC,
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@ -929,6 +930,7 @@ static struct ggml_backend_metal_context * ggml_metal_init(ggml_backend_dev_t de
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_UPSCALE_F32, upscale_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_PAD_F32, pad_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_PAD_REFLECT_1D_F32, pad_reflect_1d_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_UNPAD_F32, unpad_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_TIMESTEP_EMBEDDING_F32, timestep_embedding_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_ARANGE_F32, arange_f32, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_ARGSORT_F32_I32_ASC, argsort_f32_i32_asc, true);
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@ -1226,6 +1228,7 @@ static bool ggml_metal_supports_op(const struct ggml_backend_metal_device_contex
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case GGML_OP_UPSCALE:
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case GGML_OP_PAD:
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case GGML_OP_PAD_REFLECT_1D:
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case GGML_OP_UNPAD:
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case GGML_OP_ARANGE:
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case GGML_OP_TIMESTEP_EMBEDDING:
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case GGML_OP_ARGSORT:
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@ -3429,6 +3432,36 @@ static void ggml_metal_encode_node(
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const int nth = MIN(1024, ne0);
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[encoder dispatchThreadgroups:MTLSizeMake(ne1, ne2, ne3) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)];
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} break;
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case GGML_OP_UNPAD:
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{
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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id<MTLComputePipelineState> pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_UNPAD_F32].pipeline;
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[encoder setComputePipelineState:pipeline];
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[encoder setBuffer:id_src0 offset:offs_src0 atIndex:0];
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[encoder setBuffer:id_dst offset:offs_dst atIndex:1];
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[encoder setBytes:&ne00 length:sizeof(ne00) atIndex:2];
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[encoder setBytes:&ne01 length:sizeof(ne01) atIndex:3];
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[encoder setBytes:&ne02 length:sizeof(ne02) atIndex:4];
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[encoder setBytes:&ne03 length:sizeof(ne03) atIndex:5];
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[encoder setBytes:&nb00 length:sizeof(nb00) atIndex:6];
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[encoder setBytes:&nb01 length:sizeof(nb01) atIndex:7];
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[encoder setBytes:&nb02 length:sizeof(nb02) atIndex:8];
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[encoder setBytes:&nb03 length:sizeof(nb03) atIndex:9];
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[encoder setBytes:&ne0 length:sizeof(ne0) atIndex:10];
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[encoder setBytes:&ne1 length:sizeof(ne1) atIndex:11];
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[encoder setBytes:&ne2 length:sizeof(ne2) atIndex:12];
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[encoder setBytes:&ne3 length:sizeof(ne3) atIndex:13];
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[encoder setBytes:&nb0 length:sizeof(nb0) atIndex:14];
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[encoder setBytes:&nb1 length:sizeof(nb1) atIndex:15];
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[encoder setBytes:&nb2 length:sizeof(nb2) atIndex:16];
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[encoder setBytes:&nb3 length:sizeof(nb3) atIndex:17];
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const int nth = MIN(1024, ne0);
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[encoder dispatchThreadgroups:MTLSizeMake(ne1, ne2, ne3) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)];
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} break;
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case GGML_OP_ARANGE:
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@ -2944,6 +2944,51 @@ kernel void kernel_pad_reflect_1d_f32(
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}
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}
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kernel void kernel_unpad_f32(
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device const char * src0,
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device char * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int64_t & ne02,
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constant int64_t & ne03,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant uint64_t & nb03,
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constant int64_t & ne0,
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constant int64_t & ne1,
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constant int64_t & ne2,
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constant int64_t & ne3,
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constant uint64_t & nb0,
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constant uint64_t & nb1,
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constant uint64_t & nb2,
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constant uint64_t & nb3,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]) {
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const int64_t i3 = tgpig.z;
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const int64_t i2 = tgpig.y;
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const int64_t i1 = tgpig.x;
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const int64_t i03 = i3;
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const int64_t i02 = i2;
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const int64_t i01 = i1;
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device const float * src0_ptr = (device const float *) (src0 + i03*nb03 + i02*nb02 + i01*nb01);
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device float * dst_ptr = (device float *) (dst + i3*nb3 + i2*nb2 + i1*nb1);
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if (i1 < ne01 && i2 < ne02 && i3 < ne03) {
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for (int i0 = tpitg.x; i0 < ne0; i0 += ntg.x) {
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if (i0 < ne00) {
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dst_ptr[i0] = src0_ptr[i0];
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}
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}
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return;
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}
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}
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kernel void kernel_arange_f32(
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device char * dst,
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constant int64_t & ne0,
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@ -958,6 +958,7 @@ static const char * GGML_OP_NAME[GGML_OP_COUNT] = {
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"UPSCALE",
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"PAD",
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"PAD_REFLECT_1D",
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"UNPAD",
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"ARANGE",
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"TIMESTEP_EMBEDDING",
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"ARGSORT",
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@ -992,7 +993,7 @@ static const char * GGML_OP_NAME[GGML_OP_COUNT] = {
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"OPT_STEP_ADAMW",
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};
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static_assert(GGML_OP_COUNT == 83, "GGML_OP_COUNT != 83");
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static_assert(GGML_OP_COUNT == 84, "GGML_OP_COUNT != 84");
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static const char * GGML_OP_SYMBOL[GGML_OP_COUNT] = {
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"none",
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@ -1055,6 +1056,7 @@ static const char * GGML_OP_SYMBOL[GGML_OP_COUNT] = {
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"upscale(x)",
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"pad(x)",
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"pad_reflect_1d(x)",
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"unpad(x)",
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"arange(start, stop, step)",
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"timestep_embedding(timesteps, dim, max_period)",
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"argsort(x)",
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@ -1089,7 +1091,7 @@ static const char * GGML_OP_SYMBOL[GGML_OP_COUNT] = {
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"adamw(x)",
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};
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static_assert(GGML_OP_COUNT == 83, "GGML_OP_COUNT != 83");
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static_assert(GGML_OP_COUNT == 84, "GGML_OP_COUNT != 84");
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static_assert(GGML_OP_POOL_COUNT == 2, "GGML_OP_POOL_COUNT != 2");
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@ -4221,6 +4223,25 @@ struct ggml_tensor * ggml_pad_reflect_1d(
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return result;
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}
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// ggml_unpad
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struct ggml_tensor * ggml_unpad(
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struct ggml_context * ctx,
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struct ggml_tensor * a,
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int p0, int p1, int p2, int p3) {
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struct ggml_tensor * result = ggml_new_tensor_4d(ctx, a->type,
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a->ne[0] - p0,
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a->ne[1] - p1,
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a->ne[2] - p2,
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a->ne[3] - p3);
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result->op = GGML_OP_UNPAD;
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result->src[0] = a;
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return result;
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}
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// ggml_arange
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struct ggml_tensor * ggml_arange(
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