ggml : GPU-accelerated token generation (#1412)
* CUDA kernel for q4_0 dequant. + mat. vec. mult. * Added q4_1 via template * Added missing __syncthreads(); * --gpu_layers -> --gpu-layers * Shorter dequantize_mul_mat_vec line * q5_0 dequantize_mul_mat kernel * More readable dequantize_mul_mat_vec logic * dequantize_mul_mat_vec kernels for q5_1, q8_0, f16 * llama : offload "output" tensor to GPU too + coding style fixes --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
This commit is contained in:
Johannes Gäßler
GitHub
parent
f954edda93
commit
905d87b70a
8 changed files with 336 additions and 42 deletions
287
ggml-cuda.cu
287
ggml-cuda.cu
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@ -32,9 +32,15 @@ static_assert(sizeof(half) == sizeof(ggml_fp16_t), "wrong fp16 size");
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} \
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} while (0)
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typedef void (*dequantize_kernel_t)(const void * vx, const int ib, const int iqs, float & v0, float & v1);
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typedef void (*to_fp32_cuda_t)(const void * x, float * y, int k, cudaStream_t stream);
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typedef void (*dequantize_mul_mat_vec_cuda_t)(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream);
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// QK = number of values after dequantization
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// QR = QK / number of values before dequantization
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#define QK4_0 32
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#define QR4_0 2
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typedef struct {
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float d; // delta
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uint8_t qs[QK4_0 / 2]; // nibbles / quants
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@ -42,6 +48,7 @@ typedef struct {
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static_assert(sizeof(block_q4_0) == sizeof(float) + QK4_0 / 2, "wrong q4_0 block size/padding");
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#define QK4_1 32
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#define QR4_1 2
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typedef struct {
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float d; // delta
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float m; // min
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@ -50,6 +57,7 @@ typedef struct {
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static_assert(sizeof(block_q4_1) == sizeof(float) * 2 + QK4_1 / 2, "wrong q4_1 block size/padding");
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#define QK5_0 32
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#define QR5_0 2
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typedef struct {
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half d; // delta
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uint8_t qh[4]; // 5-th bit of quants
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@ -58,6 +66,7 @@ typedef struct {
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static_assert(sizeof(block_q5_0) == sizeof(ggml_fp16_t) + sizeof(uint32_t) + QK5_0 / 2, "wrong q5_0 block size/padding");
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#define QK5_1 32
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#define QR5_1 2
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typedef struct {
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half d; // delta
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half m; // min
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@ -67,12 +76,100 @@ typedef struct {
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static_assert(sizeof(block_q5_1) == 2 * sizeof(ggml_fp16_t) + sizeof(uint32_t) + QK5_1 / 2, "wrong q5_1 block size/padding");
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#define QK8_0 32
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#define QR8_0 1
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typedef struct {
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float d; // delta
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int8_t qs[QK8_0]; // quants
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} block_q8_0;
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static_assert(sizeof(block_q8_0) == sizeof(float) + QK8_0, "wrong q8_0 block size/padding");
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#define CUDA_DMMV_BLOCK_SIZE 32
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static __device__ void dequantize_q4_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const block_q4_0 * x = (const block_q4_0 *) vx;
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const float d = x[ib].d;
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const uint8_t vui = x[ib].qs[iqs];
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const int8_t vi0 = vui & 0xF;
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const int8_t vi1 = vui >> 4;
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v0 = (vi0 - 8)*d;
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v1 = (vi1 - 8)*d;
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}
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static __device__ void dequantize_q4_1(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const block_q4_1 * x = (const block_q4_1 *) vx;
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const float d = x[ib].d;
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const float m = x[ib].m;
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const uint8_t vui = x[ib].qs[iqs];
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const int8_t vi0 = vui & 0xF;
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const int8_t vi1 = vui >> 4;
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v0 = vi0*d + m;
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v1 = vi1*d + m;
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}
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static __device__ void dequantize_q5_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const block_q5_0 * x = (const block_q5_0 *) vx;
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const float d = x[ib].d;
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uint32_t qh;
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memcpy(&qh, x[ib].qh, sizeof(qh));
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const uint8_t xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
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const uint8_t xh_1 = ((qh >> (iqs + 12)) ) & 0x10;
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const int32_t x0 = ((x[ib].qs[iqs] & 0xf) | xh_0) - 16;
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const int32_t x1 = ((x[ib].qs[iqs] >> 4) | xh_1) - 16;
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v0 = x0*d;
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v1 = x1*d;
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}
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static __device__ void dequantize_q5_1(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const block_q5_1 * x = (const block_q5_1 *) vx;
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const float d = x[ib].d;
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const float m = x[ib].m;
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uint32_t qh;
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memcpy(&qh, x[ib].qh, sizeof(qh));
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const uint8_t xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
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const uint8_t xh_1 = ((qh >> (iqs + 12)) ) & 0x10;
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const int32_t x0 = ((x[ib].qs[iqs] & 0xf) | xh_0);
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const int32_t x1 = ((x[ib].qs[iqs] >> 4) | xh_1);
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v0 = x0*d + m;
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v1 = x1*d + m;
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}
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static __device__ void dequantize_q8_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const block_q8_0 * x = (const block_q8_0 *) vx;
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const float d = x[ib].d;
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const int8_t vi0 = x[ib].qs[iqs + 0];
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const int8_t vi1 = x[ib].qs[iqs + 1];
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v0 = vi0*d;
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v1 = vi1*d;
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}
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static __device__ void convert_f16(const void * vx, const int ib, const int iqs, float & v0, float & v1){
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const half * x = (const half *) vx;
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v0 = __half2float(x[ib + 0]);
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v1 = __half2float(x[ib + 1]);
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}
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static __global__ void dequantize_block_q4_0(const void * vx, float * y) {
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static const int qk = QK4_0;
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@ -173,6 +270,44 @@ static __global__ void dequantize_block_q8_0(const void * vx, float * y) {
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}
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}
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template <int block_size, int qk, int qr, dequantize_kernel_t dequantize_kernel>
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static __global__ void dequantize_mul_mat_vec(const void * vx, const float * y, float * dst, const int ncols) {
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const int row = blockIdx.x;
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const int tid = threadIdx.x;
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const int y_offset = qr == 1 ? 1 : qk/2;
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__shared__ float tmp[block_size]; // separate sum for each thread
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tmp[tid] = 0;
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for (int i = 0; i < ncols/block_size; i += 2) {
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const int col = i*block_size + 2*tid;
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const int ib = (row*ncols + col)/qk; // block index
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const int iqs = (col%qk)/qr; // quant index
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const int iybs = col - col%qk; // y block start index
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// dequantize
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float v0, v1;
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dequantize_kernel(vx, ib, iqs, v0, v1);
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// matrix multiplication
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tmp[tid] += v0 * y[iybs + iqs + 0];
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tmp[tid] += v1 * y[iybs + iqs + y_offset];
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}
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// sum up partial sums and write back result
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__syncthreads();
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for (int s=block_size/2; s>0; s>>=1) {
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if (tid < s) {
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tmp[tid] += tmp[tid + s];
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}
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__syncthreads();
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}
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if (tid == 0) {
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dst[row] = tmp[0];
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}
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}
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static void dequantize_row_q4_0_cuda(const void * vx, float * y, int k, cudaStream_t stream) {
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const int nb = k / QK4_0;
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dequantize_block_q4_0<<<nb, 1, 0, stream>>>(vx, y);
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@ -198,6 +333,36 @@ static void dequantize_row_q8_0_cuda(const void * vx, float * y, int k, cudaStre
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dequantize_block_q8_0<<<nb, 1, 0, stream>>>(vx, y);
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}
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static void dequantize_mul_mat_vec_q4_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, QK4_0, QR4_0, dequantize_q4_0>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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static void dequantize_mul_mat_vec_q4_1_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, QK4_1, QR4_1, dequantize_q4_1>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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static void dequantize_mul_mat_vec_q5_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, QK5_0, QR5_0, dequantize_q5_0>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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static void dequantize_mul_mat_vec_q5_1_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, QK5_1, QR5_1, dequantize_q5_1>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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static void dequantize_mul_mat_vec_q8_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, QK8_0, QR8_0, dequantize_q8_0>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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// TODO: optimize
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static __global__ void convert_fp16_to_fp32(const void * vx, float * y) {
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const half * x = (const half *) vx;
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@ -211,6 +376,12 @@ static void convert_fp16_to_fp32_cuda(const void * x, float * y, int k, cudaStre
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convert_fp16_to_fp32<<<k, 1, 0, stream>>>(x, y);
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}
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static void convert_mul_mat_vec_f16_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
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GGML_ASSERT(ncols % CUDA_DMMV_BLOCK_SIZE == 0);
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dequantize_mul_mat_vec<CUDA_DMMV_BLOCK_SIZE, 32, 1, convert_f16>
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<<<nrows, CUDA_DMMV_BLOCK_SIZE, 0, stream>>>(vx, y, dst, ncols);
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}
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static to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
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switch (type) {
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case GGML_TYPE_Q4_0:
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@ -230,8 +401,27 @@ static to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
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}
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}
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static dequantize_mul_mat_vec_cuda_t ggml_get_dequantize_mul_mat_vec_cuda(ggml_type type) {
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switch (type) {
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case GGML_TYPE_Q4_0:
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return dequantize_mul_mat_vec_q4_0_cuda;
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case GGML_TYPE_Q4_1:
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return dequantize_mul_mat_vec_q4_1_cuda;
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case GGML_TYPE_Q5_0:
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return dequantize_mul_mat_vec_q5_0_cuda;
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case GGML_TYPE_Q5_1:
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return dequantize_mul_mat_vec_q5_1_cuda;
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case GGML_TYPE_Q8_0:
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return dequantize_mul_mat_vec_q8_0_cuda;
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case GGML_TYPE_F16:
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return dequantize_mul_mat_vec_q8_0_cuda;
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default:
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return nullptr;
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}
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}
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// buffer pool for cuda
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#define MAX_CUDA_BUFFERS 16
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#define MAX_CUDA_BUFFERS 256
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struct scoped_spin_lock {
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std::atomic_flag& lock;
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@ -528,6 +718,7 @@ static void ggml_cuda_mul_mat_q_f32(const ggml_tensor * src0, const ggml_tensor
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const int nb2 = dst->nb[2];
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const int nb3 = dst->nb[3];
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const ggml_type type = src0->type;
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const bool mul_mat_vec = ne11 == 1;
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const float alpha = 1.0f;
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const float beta = 0.0f;
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@ -538,12 +729,16 @@ static void ggml_cuda_mul_mat_q_f32(const ggml_tensor * src0, const ggml_tensor
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const size_t q_sz = ggml_type_size(type) * x_ne / ggml_blck_size(type);
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size_t x_size, y_size, d_size, q_size;
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float * d_X = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * x_ne, &x_size);
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float * d_X = nullptr;
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if (!mul_mat_vec) {
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d_X = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * x_ne, &x_size);
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}
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float * d_Y = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * y_ne, &y_size);
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float * d_D = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * d_ne, &d_size);
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char * d_Q = (char *) ggml_cuda_pool_malloc(n_mm * q_sz, &q_size);
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const to_fp32_cuda_t to_fp32_cuda = ggml_get_to_fp32_cuda(type);
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dequantize_mul_mat_vec_cuda_t dmmv = ggml_get_dequantize_mul_mat_vec_cuda(type);
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GGML_ASSERT(to_fp32_cuda != nullptr);
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for (int64_t i03 = 0; i03 < ne03; i03++) {
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@ -553,31 +748,54 @@ static void ggml_cuda_mul_mat_q_f32(const ggml_tensor * src0, const ggml_tensor
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cudaStream_t cudaStream2 = g_cudaStreams2[i % GGML_CUDA_MAX_STREAMS];
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cudaEvent_t cudaEvent = g_cudaEvents[i % GGML_CUDA_MAX_EVENTS];
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float * c_X = d_X + i * x_ne;
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float * c_Y = d_Y + i * y_ne;
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float * c_D = d_D + i * d_ne;
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char * c_Q = d_Q + i * q_sz;
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// copy src0 and convert to fp32 on device
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CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Q, src0, i03, i02, cudaStream2));
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to_fp32_cuda(c_Q, c_X, x_ne, cudaStream2);
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CUDA_CHECK(cudaGetLastError());
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CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
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// copy src0 to device if necessary
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if (src0->backend == GGML_BACKEND_CPU) {
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CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Q, src0, i03, i02, cudaStream2));
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} else if (src0->backend == GGML_BACKEND_CUDA) {
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c_Q = ((char *) src0->data) + i * q_sz;
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} else {
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GGML_ASSERT(false);
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}
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if (mul_mat_vec) { // specialized dequantize_mul_mat_vec kernel
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CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
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// copy src1 to device
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CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
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// copy src1 to device
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CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
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// wait for conversion
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CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
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// wait for data
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CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
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// compute
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CUBLAS_CHECK(cublasSetStream(g_cublasH, cudaStream));
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CUBLAS_CHECK(
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cublasSgemm(g_cublasH, CUBLAS_OP_T, CUBLAS_OP_N,
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ne01, ne11, ne10,
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&alpha, c_X, ne00,
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c_Y, ne10,
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&beta, c_D, ne01));
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// compute
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dmmv(c_Q, c_Y, c_D, ne00, ne01, cudaStream);
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CUDA_CHECK(cudaGetLastError());
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} else { // general dequantization kernel + cuBLAS matrix matrix multiplication
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float * c_X = d_X + i * x_ne;
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// convert src0 to fp32 on device
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to_fp32_cuda(c_Q, c_X, x_ne, cudaStream2);
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CUDA_CHECK(cudaGetLastError());
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CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
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// copy src1 to device
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CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
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||||
// wait for conversion
|
||||
CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
|
||||
|
||||
// compute
|
||||
CUBLAS_CHECK(cublasSetStream(g_cublasH, cudaStream));
|
||||
CUBLAS_CHECK(
|
||||
cublasSgemm(g_cublasH, CUBLAS_OP_T, CUBLAS_OP_N,
|
||||
ne01, ne11, ne10,
|
||||
&alpha, c_X, ne00,
|
||||
c_Y, ne10,
|
||||
&beta, c_D, ne01));
|
||||
}
|
||||
|
||||
// copy dst to host
|
||||
float * d = (float *) ((char *) dst->data + i02*nb2 + i03*nb3);
|
||||
|
|
@ -586,7 +804,9 @@ static void ggml_cuda_mul_mat_q_f32(const ggml_tensor * src0, const ggml_tensor
|
|||
}
|
||||
|
||||
CUDA_CHECK(cudaDeviceSynchronize());
|
||||
ggml_cuda_pool_free(d_X, x_size);
|
||||
if (!mul_mat_vec) {
|
||||
ggml_cuda_pool_free(d_X, x_size);
|
||||
}
|
||||
ggml_cuda_pool_free(d_Y, y_size);
|
||||
ggml_cuda_pool_free(d_D, d_size);
|
||||
ggml_cuda_pool_free(d_Q, q_size);
|
||||
|
|
@ -602,8 +822,7 @@ bool ggml_cuda_can_mul_mat(const struct ggml_tensor * src0, const struct ggml_te
|
|||
if ((src0->type == GGML_TYPE_F32 || src0->type == GGML_TYPE_F16 || ggml_is_quantized(src0->type)) &&
|
||||
src1->type == GGML_TYPE_F32 &&
|
||||
dst->type == GGML_TYPE_F32 &&
|
||||
(ne0 >= 32 && ne1 >= 32 && ne10 >= 32)) {
|
||||
|
||||
((ne0 >= 32 && ne1 >= 32 && ne10 >= 32) || src0->backend == GGML_BACKEND_CUDA)) {
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
@ -655,3 +874,25 @@ size_t ggml_cuda_mul_mat_get_wsize(const struct ggml_tensor * src0, const struct
|
|||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void ggml_cuda_transform_tensor(ggml_tensor * tensor) {
|
||||
const int64_t ne0 = tensor->ne[0];
|
||||
const int64_t ne1 = tensor->ne[1];
|
||||
const int64_t ne2 = tensor->ne[2];
|
||||
const int64_t ne3 = tensor->ne[3];
|
||||
|
||||
const ggml_type type = tensor->type;
|
||||
const size_t q_sz = ggml_type_size(type) * ne0 * ne1 * ne2 * ne3 / ggml_blck_size(type);
|
||||
|
||||
size_t q_size;
|
||||
char * d_Q = (char *) ggml_cuda_pool_malloc(q_sz, &q_size);
|
||||
|
||||
cudaStream_t cudaStream2 = g_cudaStreams2[0];
|
||||
|
||||
// copy tensor to device
|
||||
CUDA_CHECK(ggml_cuda_h2d_tensor_2d(d_Q, tensor, 0, 0, cudaStream2));
|
||||
CUDA_CHECK(cudaDeviceSynchronize());
|
||||
|
||||
tensor->data = d_Q;
|
||||
tensor->backend = GGML_BACKEND_CUDA;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue