!fixup
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@ -1516,6 +1516,7 @@ static void ggml_cuda_op(const ggml_tensor * src0, const ggml_tensor * src1, ggm
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// There is possibly a bug in the Windows nvcc compiler regarding instruction reordering or optimizing out local variables.
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// There is possibly a bug in the Windows nvcc compiler regarding instruction reordering or optimizing out local variables.
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// Removing the first assert or changing the order of the arguments causes the second assert to fail.
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// Removing the first assert or changing the order of the arguments causes the second assert to fail.
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// Removing both asserts results in i01_high becoming 0 which in turn results in garbage output.
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// Removing both asserts results in i01_high becoming 0 which in turn results in garbage output.
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// The root cause seems to be a problem with i0_offset_high becoming 0 when it should always be 1 (for single GPU).
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GGML_ASSERT(i01_low == 0 || g_device_count > 1);
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GGML_ASSERT(i01_low == 0 || g_device_count > 1);
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GGML_ASSERT(i01_high == ne01 || g_device_count > 1);
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GGML_ASSERT(i01_high == ne01 || g_device_count > 1);
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