ggml : build backends as libraries (#10256)
* ggml : build backends as libraries --------- Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com> Co-authored-by: Georgi Gerganov <ggerganov@gmail.com> Co-authored-by: R0CKSTAR <xiaodong.ye@mthreads.com>
This commit is contained in:
Diego Devesa
GitHub
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commit
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191 changed files with 17541 additions and 16879 deletions
371
ggml/src/ggml-cpu/ggml-cpu-impl.h
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371
ggml/src/ggml-cpu/ggml-cpu-impl.h
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#pragma once
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// GGML CPU internal header
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#include "ggml.h"
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#include "ggml-impl.h"
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#include <stdlib.h> // load `stdlib.h` before other headers to work around MinGW bug: https://sourceforge.net/p/mingw-w64/bugs/192/
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//#include <stddef.h>
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#include <stdbool.h>
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#include <string.h> // memcpy
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#include <math.h> // fabsf
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(_MSC_VER)
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#define m512bh(p) p
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#define m512i(p) p
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#else
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#define m512bh(p) (__m512bh)(p)
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#define m512i(p) (__m512i)(p)
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#endif
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// __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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#if defined(_MSC_VER) && (defined(__AVX2__) || defined(__AVX512F__))
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#ifndef __FMA__
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#define __FMA__
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#endif
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#ifndef __F16C__
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#define __F16C__
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#endif
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#endif
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// __SSE3__ and __SSSE3__ are not defined in MSVC, but SSE3/SSSE3 are present when AVX/AVX2/AVX512 are available
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#if defined(_MSC_VER) && (defined(__AVX__) || defined(__AVX2__) || defined(__AVX512F__))
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#ifndef __SSE3__
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#define __SSE3__
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#endif
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#ifndef __SSSE3__
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#define __SSSE3__
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#endif
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#endif
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#if defined(__ARM_FEATURE_SVE)
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#include <arm_sve.h>
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#include <sys/prctl.h>
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#endif
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// 16-bit float
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// on Arm, we use __fp16
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// on x86, we use uint16_t
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#if defined(__ARM_NEON)
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// if YCM cannot find <arm_neon.h>, make a symbolic link to it, for example:
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//
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// $ ln -sfn /Library/Developer/CommandLineTools/usr/lib/clang/13.1.6/include/arm_neon.h ./src/
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//
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#include <arm_neon.h>
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#ifdef _MSC_VER
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typedef uint16_t ggml_fp16_internal_t;
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#define ggml_vld1q_u32(w,x,y,z) { ((w) + ((uint64_t)(x) << 32)), ((y) + ((uint64_t)(z) << 32)) }
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#else
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typedef __fp16 ggml_fp16_internal_t;
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#define ggml_vld1q_u32(w,x,y,z) { (w), (x), (y), (z) }
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#endif // _MSC_VER
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#if !defined(__aarch64__)
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// 32-bit ARM compatibility
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// vaddlvq_s16
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// vpaddq_s16
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// vpaddq_s32
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// vaddvq_s32
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// vaddvq_f32
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// vmaxvq_f32
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// vcvtnq_s32_f32
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// vzip1_u8
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// vzip2_u8
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inline static int32_t vaddlvq_s16(int16x8_t v) {
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int32x4_t v0 = vreinterpretq_s32_s64(vpaddlq_s32(vpaddlq_s16(v)));
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return vgetq_lane_s32(v0, 0) + vgetq_lane_s32(v0, 2);
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}
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inline static int16x8_t vpaddq_s16(int16x8_t a, int16x8_t b) {
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int16x4_t a0 = vpadd_s16(vget_low_s16(a), vget_high_s16(a));
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int16x4_t b0 = vpadd_s16(vget_low_s16(b), vget_high_s16(b));
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return vcombine_s16(a0, b0);
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}
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inline static int32x4_t vpaddq_s32(int32x4_t a, int32x4_t b) {
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int32x2_t a0 = vpadd_s32(vget_low_s32(a), vget_high_s32(a));
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int32x2_t b0 = vpadd_s32(vget_low_s32(b), vget_high_s32(b));
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return vcombine_s32(a0, b0);
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}
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inline static int32_t vaddvq_s32(int32x4_t v) {
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return vgetq_lane_s32(v, 0) + vgetq_lane_s32(v, 1) + vgetq_lane_s32(v, 2) + vgetq_lane_s32(v, 3);
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}
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inline static float vaddvq_f32(float32x4_t v) {
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return vgetq_lane_f32(v, 0) + vgetq_lane_f32(v, 1) + vgetq_lane_f32(v, 2) + vgetq_lane_f32(v, 3);
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}
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inline static float vmaxvq_f32(float32x4_t v) {
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return
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MAX(MAX(vgetq_lane_f32(v, 0), vgetq_lane_f32(v, 1)),
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MAX(vgetq_lane_f32(v, 2), vgetq_lane_f32(v, 3)));
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}
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inline static int32x4_t vcvtnq_s32_f32(float32x4_t v) {
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int32x4_t res;
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res[0] = roundf(vgetq_lane_f32(v, 0));
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res[1] = roundf(vgetq_lane_f32(v, 1));
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res[2] = roundf(vgetq_lane_f32(v, 2));
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res[3] = roundf(vgetq_lane_f32(v, 3));
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return res;
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}
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inline static uint8x8_t vzip1_u8(uint8x8_t a, uint8x8_t b) {
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uint8x8_t res;
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res[0] = a[0]; res[1] = b[0];
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res[2] = a[1]; res[3] = b[1];
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res[4] = a[2]; res[5] = b[2];
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res[6] = a[3]; res[7] = b[3];
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return res;
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}
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inline static uint8x8_t vzip2_u8(uint8x8_t a, uint8x8_t b) {
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uint8x8_t res;
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res[0] = a[4]; res[1] = b[4];
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res[2] = a[5]; res[3] = b[5];
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res[4] = a[6]; res[5] = b[6];
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res[6] = a[7]; res[7] = b[7];
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return res;
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}
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// vld1q_s16_x2
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// vld1q_u8_x2
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// vld1q_u8_x4
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// vld1q_s8_x2
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// vld1q_s8_x4
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// TODO: double-check these work correctly
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typedef struct ggml_int16x8x2_t {
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int16x8_t val[2];
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} ggml_int16x8x2_t;
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inline static ggml_int16x8x2_t ggml_vld1q_s16_x2(const int16_t * ptr) {
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ggml_int16x8x2_t res;
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res.val[0] = vld1q_s16(ptr + 0);
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res.val[1] = vld1q_s16(ptr + 8);
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return res;
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}
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typedef struct ggml_uint8x16x2_t {
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uint8x16_t val[2];
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} ggml_uint8x16x2_t;
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inline static ggml_uint8x16x2_t ggml_vld1q_u8_x2(const uint8_t * ptr) {
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ggml_uint8x16x2_t res;
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res.val[0] = vld1q_u8(ptr + 0);
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res.val[1] = vld1q_u8(ptr + 16);
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return res;
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}
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typedef struct ggml_uint8x16x4_t {
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uint8x16_t val[4];
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} ggml_uint8x16x4_t;
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inline static ggml_uint8x16x4_t ggml_vld1q_u8_x4(const uint8_t * ptr) {
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ggml_uint8x16x4_t res;
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res.val[0] = vld1q_u8(ptr + 0);
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res.val[1] = vld1q_u8(ptr + 16);
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res.val[2] = vld1q_u8(ptr + 32);
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res.val[3] = vld1q_u8(ptr + 48);
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return res;
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}
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typedef struct ggml_int8x16x2_t {
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int8x16_t val[2];
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} ggml_int8x16x2_t;
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inline static ggml_int8x16x2_t ggml_vld1q_s8_x2(const int8_t * ptr) {
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ggml_int8x16x2_t res;
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res.val[0] = vld1q_s8(ptr + 0);
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res.val[1] = vld1q_s8(ptr + 16);
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return res;
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}
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typedef struct ggml_int8x16x4_t {
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int8x16_t val[4];
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} ggml_int8x16x4_t;
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inline static ggml_int8x16x4_t ggml_vld1q_s8_x4(const int8_t * ptr) {
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ggml_int8x16x4_t res;
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res.val[0] = vld1q_s8(ptr + 0);
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res.val[1] = vld1q_s8(ptr + 16);
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res.val[2] = vld1q_s8(ptr + 32);
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res.val[3] = vld1q_s8(ptr + 48);
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return res;
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}
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// NOTE: not tested
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inline static int8x16_t ggml_vqtbl1q_s8(int8x16_t a, uint8x16_t b) {
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int8x16_t res;
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res[ 0] = a[b[ 0]];
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res[ 1] = a[b[ 1]];
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res[ 2] = a[b[ 2]];
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res[ 3] = a[b[ 3]];
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res[ 4] = a[b[ 4]];
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res[ 5] = a[b[ 5]];
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res[ 6] = a[b[ 6]];
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res[ 7] = a[b[ 7]];
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res[ 8] = a[b[ 8]];
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res[ 9] = a[b[ 9]];
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res[10] = a[b[10]];
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res[11] = a[b[11]];
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res[12] = a[b[12]];
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res[13] = a[b[13]];
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res[14] = a[b[14]];
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res[15] = a[b[15]];
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return res;
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}
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// NOTE: not tested
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inline static uint8x16_t ggml_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) {
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uint8x16_t res;
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res[ 0] = a[b[ 0]];
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res[ 1] = a[b[ 1]];
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res[ 2] = a[b[ 2]];
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res[ 3] = a[b[ 3]];
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res[ 4] = a[b[ 4]];
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res[ 5] = a[b[ 5]];
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res[ 6] = a[b[ 6]];
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res[ 7] = a[b[ 7]];
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res[ 8] = a[b[ 8]];
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res[ 9] = a[b[ 9]];
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res[10] = a[b[10]];
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res[11] = a[b[11]];
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res[12] = a[b[12]];
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res[13] = a[b[13]];
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res[14] = a[b[14]];
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res[15] = a[b[15]];
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return res;
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}
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#else
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#define ggml_int16x8x2_t int16x8x2_t
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#define ggml_uint8x16x2_t uint8x16x2_t
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#define ggml_uint8x16x4_t uint8x16x4_t
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#define ggml_int8x16x2_t int8x16x2_t
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#define ggml_int8x16x4_t int8x16x4_t
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#define ggml_vld1q_s16_x2 vld1q_s16_x2
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#define ggml_vld1q_u8_x2 vld1q_u8_x2
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#define ggml_vld1q_u8_x4 vld1q_u8_x4
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#define ggml_vld1q_s8_x2 vld1q_s8_x2
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#define ggml_vld1q_s8_x4 vld1q_s8_x4
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#define ggml_vqtbl1q_s8 vqtbl1q_s8
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#define ggml_vqtbl1q_u8 vqtbl1q_u8
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#endif // !defined(__aarch64__)
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#if !defined(__ARM_FEATURE_DOTPROD)
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inline static int32x4_t ggml_vdotq_s32(int32x4_t acc, int8x16_t a, int8x16_t b) {
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const int16x8_t p0 = vmull_s8(vget_low_s8 (a), vget_low_s8 (b));
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const int16x8_t p1 = vmull_s8(vget_high_s8(a), vget_high_s8(b));
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return vaddq_s32(acc, vaddq_s32(vpaddlq_s16(p0), vpaddlq_s16(p1)));
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}
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#else
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#define ggml_vdotq_s32(a, b, c) vdotq_s32(a, b, c)
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#endif // !defined(__ARM_FEATURE_DOTPROD)
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#endif // defined(__ARM_NEON)
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#ifdef __wasm_simd128__
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#include <wasm_simd128.h>
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#else
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#ifdef __POWER9_VECTOR__
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#include <altivec.h>
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#undef bool
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#define bool _Bool
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#else
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#if defined(_MSC_VER) || defined(__MINGW32__)
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#include <intrin.h>
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#else
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#if defined(__AVX__) || defined(__AVX2__) || defined(__AVX512F__) || defined(__SSSE3__) || defined(__SSE3__) || defined(__SSE__)
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#if !defined(__riscv)
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#include <immintrin.h>
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#endif
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#endif
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#endif
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#endif
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#endif
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#ifdef __riscv_v_intrinsic
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#include <riscv_vector.h>
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#endif
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#if defined(__loongarch64)
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#if defined(__loongarch_asx)
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#include <lasxintrin.h>
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#endif
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#if defined(__loongarch_sx)
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#include <lsxintrin.h>
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#endif
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#endif
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#if defined(__loongarch_asx)
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typedef union {
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int32_t i;
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float f;
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} ft_union;
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/* float type data load instructions */
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static __m128 __lsx_vreplfr2vr_s(float val) {
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ft_union fi_tmpval = {.f = val};
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return (__m128)__lsx_vreplgr2vr_w(fi_tmpval.i);
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}
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static __m256 __lasx_xvreplfr2vr_s(float val) {
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ft_union fi_tmpval = {.f = val};
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return (__m256)__lasx_xvreplgr2vr_w(fi_tmpval.i);
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}
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#endif
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#ifdef __cplusplus
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}
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#endif
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