Enable F16C/CVT16 vector extensions on MSVC
__F16C__ macro does not exist in MSVC, but is implied with AVX2/AVX512
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1 changed files with 11 additions and 8 deletions
19
ggml.c
19
ggml.c
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@ -79,6 +79,16 @@ static int sched_yield (void) {
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typedef void* thread_ret_t;
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typedef void* thread_ret_t;
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#endif
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#endif
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// __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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#if defined(_MSC_VER) && (defined(__AVX2__) || defined(__AVX512F__))
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#ifndef __FMA__
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#define __FMA__
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#endif
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#ifndef __F16C__
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#define __F16C__
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#endif
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#endif
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#ifdef __HAIKU__
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#ifdef __HAIKU__
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#define static_assert(cond, msg) _Static_assert(cond, msg)
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#define static_assert(cond, msg) _Static_assert(cond, msg)
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#endif
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#endif
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@ -407,16 +417,9 @@ static const size_t CACHE_LINE_SIZE_F32 = CACHE_LINE_SIZE/sizeof(float);
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#define QK 32
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#define QK 32
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#if __AVX2__ || __AVX512F__
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// __FMA__ is not defined in MSVC, however it is implied with AVX2/AVX512
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#if defined(_MSC_VER) && !defined(__FMA__)
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#define __FMA__
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#endif
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// AVX routines provided by GH user Const-me
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// AVX routines provided by GH user Const-me
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// ref: https://github.com/ggerganov/ggml/pull/27#issuecomment-1464934600
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// ref: https://github.com/ggerganov/ggml/pull/27#issuecomment-1464934600
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#if __AVX2__ || __AVX512F__
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// Unpack 32 4-bit fields into 32 bytes
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// Unpack 32 4-bit fields into 32 bytes
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// The output vector contains 32 bytes, each one in [ 0 .. 15 ] interval
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// The output vector contains 32 bytes, each one in [ 0 .. 15 ] interval
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static inline __m256i bytesFromNibbles( const uint8_t* rsi )
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static inline __m256i bytesFromNibbles( const uint8_t* rsi )
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