CUDA: refactor and optimize IQ MMVQ (#8215)
* CUDA: refactor and optimize IQ MMVQ * uint -> uint32_t * __dp4a -> ggml_cuda_dp4a * remove MIN_CC_DP4A checks * change default * try CI fix
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8 changed files with 406 additions and 487 deletions
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@ -106,19 +106,19 @@ typedef sycl::half2 ggml_half2;
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#define QR6_K 2
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#define QI2_XXS (QK_K / (4*QR2_XXS))
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#define QR2_XXS 8
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#define QR2_XXS 4
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#define QI2_XS (QK_K / (4*QR2_XS))
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#define QR2_XS 8
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#define QR2_XS 4
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#define QI2_S (QK_K / (4*QR2_S))
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#define QR2_S 8
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#define QR2_S 4
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#define QI3_XXS (QK_K / (4*QR3_XXS))
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#define QR3_XXS 8
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#define QR3_XXS 4
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#define QI3_XS (QK_K / (4*QR3_XS))
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#define QR3_XS 8
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#define QR3_XS 4
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#define QI1_S (QK_K / (4*QR1_S))
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#define QR1_S 8
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@ -130,10 +130,10 @@ typedef sycl::half2 ggml_half2;
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#define QR4_NL 2
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#define QI4_XS (QK_K / (4*QR4_XS))
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#define QR4_XS 8
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#define QR4_XS 2
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#define QI3_S (QK_K / (4*QR3_S))
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#define QR3_S 8
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#define QR3_S 4
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#endif // GGML_COMMON_DECL_CUDA || GGML_COMMON_DECL_HIP
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