[SYCL] Fix the sub group size of Intel (#8106)
* use warp_size macro for all sycl kernels * fix mask of permute_sub_group_by_xor * fix rms_norm with correct warp number * fix rms_norm_f32/group_norm_f32 * move norm to norm.cpp file * fix quantize bug * fix mmvq's batch size
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9 changed files with 587 additions and 509 deletions
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ggml/src/ggml-sycl/norm.hpp
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ggml/src/ggml-sycl/norm.hpp
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//
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// MIT license
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// Copyright (C) 2024 Intel Corporation
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// SPDX-License-Identifier: MIT
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//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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#ifndef GGML_SYCL_NORM_HPP
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#define GGML_SYCL_NORM_HPP
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#include "common.hpp"
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void ggml_sycl_op_norm(ggml_backend_sycl_context& ctx, const ggml_tensor* src0, const ggml_tensor* src1,
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ggml_tensor* dst, const float* src0_dd,
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const float* src1_dd, float* dst_dd,
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const queue_ptr& main_stream);
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void ggml_sycl_op_rms_norm(ggml_backend_sycl_context& ctx, const ggml_tensor* src0,
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const ggml_tensor* src1, ggml_tensor* dst,
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const float* src0_dd, const float* src1_dd,
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float* dst_dd,
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const queue_ptr& main_stream);
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void ggml_sycl_op_group_norm(ggml_backend_sycl_context& ctx, const ggml_tensor* src0,
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const ggml_tensor* src1, ggml_tensor* dst,
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const float* src0_dd, const float* src1_dd,
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float* dst_dd,
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const queue_ptr& main_stream);
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#endif // GGML_SYCL_NORM_HPP
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