array instead of global_memory
This commit is contained in:
Meng, Hengyu
parent
d2ecac551d
commit
d100b7511c
2 changed files with 29 additions and 76 deletions
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@ -448,15 +448,13 @@ static_assert(sizeof(block_iq4_xs) == sizeof(ggml_half) + sizeof(uint16_t) + QK_
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#define GGML_COMMON_IMPL
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#elif defined(GGML_COMMON_IMPL_SYCL)
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#if defined(__gnu_linux__) // workaround for windows
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#include <cstdint>
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#define GGML_TABLE_BEGIN(type, name, size) static dpct::global_memory<const type, 1> name(sycl::range<1>(size), {
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#define GGML_TABLE_END() });
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#define GGML_TABLE_BEGIN(type, name, size) static const type name[size] = {
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#define GGML_TABLE_END() };
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#define GGML_COMMON_IMPL
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#endif
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#endif
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#if defined(GGML_COMMON_IMPL)
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@ -4436,7 +4436,6 @@ static void dequantize_block_q6_K(const void * __restrict__ vx, dst_t * __restri
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#endif
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}
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#if defined(__gnu_linux__)
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template<typename dst_t>
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static void dequantize_block_iq2_xxs(const void * __restrict__ vx, dst_t * __restrict__ yy,
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const sycl::nd_item<3> &item_ct1,
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@ -4581,7 +4580,6 @@ static void dequantize_block_iq1_s(const void * __restrict__ vx, dst_t * __restr
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#endif
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}
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#endif
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/*
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DPCT1110:4: The total declared local variable size in device function
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@ -9953,23 +9951,19 @@ static void dequantize_row_q6_K_sycl(const void *vx, dst_t *y, const int k,
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}
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#if defined(__gnu_linux__)
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template <typename dst_t>
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static void dequantize_row_iq2_xxs_sycl(const void *vx, dst_t *y, const int k,
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dpct::queue_ptr stream) {
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const int nb = k / QK_K;
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{
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iq2xxs_grid.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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stream->submit([&](sycl::handler &cgh) {
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auto iq2xxs_grid_ptr_ct1 = iq2xxs_grid.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq2xxs_grid_ptr_ct1 = &iq2xxs_grid[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, 1, nb) *
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sycl::range<3>(1, 1, 32),
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@ -9988,17 +9982,14 @@ static void dequantize_row_iq2_xs_sycl(const void *vx, dst_t *y, const int k,
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dpct::queue_ptr stream) {
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const int nb = k / QK_K;
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{
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iq2xs_grid.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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stream->submit([&](sycl::handler &cgh) {
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auto iq2xs_grid_ptr_ct1 = iq2xs_grid.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq2xs_grid_ptr_ct1 = &iq2xs_grid[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, 1, nb) *
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sycl::range<3>(1, 1, 32),
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@ -10017,17 +10008,14 @@ static void dequantize_row_iq3_xxs_sycl(const void *vx, dst_t *y, const int k,
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dpct::queue_ptr stream) {
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const int nb = k / QK_K;
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{
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iq3xxs_grid.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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stream->submit([&](sycl::handler &cgh) {
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auto iq3xxs_grid_ptr_ct1 = iq3xxs_grid.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq3xxs_grid_ptr_ct1 = &iq3xxs_grid[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, 1, nb) *
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sycl::range<3>(1, 1, 32),
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@ -10046,17 +10034,14 @@ static void dequantize_row_iq3_s_sycl(const void *vx, dst_t *y, const int k,
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dpct::queue_ptr stream) {
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const int nb = k / QK_K;
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{
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iq3s_grid.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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stream->submit([&](sycl::handler &cgh) {
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auto iq3s_grid_ptr_ct1 = iq3s_grid.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq3s_grid_ptr_ct1 = &iq3s_grid[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, 1, nb) *
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sycl::range<3>(1, 1, 32),
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@ -10075,17 +10060,14 @@ static void dequantize_row_iq1_s_sycl(const void *vx, dst_t *y, const int k,
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dpct::queue_ptr stream) {
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const int nb = k / QK_K;
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{
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iq1s_grid_gpu.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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stream->submit([&](sycl::handler &cgh) {
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auto iq1s_grid_ptr_ct1 = iq1s_grid_gpu.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq1s_grid_ptr_ct1 = &iq1s_grid_gpu[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, 1, nb) *
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sycl::range<3>(1, 1, 32),
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@ -10098,7 +10080,6 @@ static void dequantize_row_iq1_s_sycl(const void *vx, dst_t *y, const int k,
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});
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}
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}
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#endif
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template <typename src_t, typename dst_t>
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static void convert_unary_sycl(const void *__restrict__ vx,
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@ -10144,7 +10125,6 @@ static to_fp16_sycl_t ggml_get_to_fp16_sycl(ggml_type type) try {
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return dequantize_row_q5_K_sycl;
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case GGML_TYPE_Q6_K:
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return dequantize_row_q6_K_sycl;
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#if defined(__gnu_linux__)
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case GGML_TYPE_IQ2_XXS:
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return dequantize_row_iq2_xxs_sycl;
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case GGML_TYPE_IQ2_XS:
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@ -10155,7 +10135,6 @@ static to_fp16_sycl_t ggml_get_to_fp16_sycl(ggml_type type) try {
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return dequantize_row_iq3_s_sycl;
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case GGML_TYPE_IQ1_S:
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return dequantize_row_iq1_s_sycl;
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#endif
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case GGML_TYPE_F32:
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return convert_unary_sycl<float>;
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default:
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@ -10190,7 +10169,6 @@ static to_fp32_sycl_t ggml_get_to_fp32_sycl(ggml_type type) {
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return dequantize_row_q5_K_sycl;
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case GGML_TYPE_Q6_K:
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return dequantize_row_q6_K_sycl;
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#if defined(__gnu_linux__)
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case GGML_TYPE_IQ2_XXS:
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return dequantize_row_iq2_xxs_sycl;
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case GGML_TYPE_IQ2_XS:
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@ -10201,7 +10179,6 @@ static to_fp32_sycl_t ggml_get_to_fp32_sycl(ggml_type type) {
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return dequantize_row_iq3_s_sycl;
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case GGML_TYPE_IQ1_S:
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return dequantize_row_iq1_s_sycl;
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#endif
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case GGML_TYPE_F16:
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return convert_unary_sycl<sycl::half>;
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default:
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@ -10654,7 +10631,7 @@ static void mul_mat_vec_q6_K_q8_1_sycl(const void *vx, const void *vy,
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}
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}
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#if defined(__gnu_linux__)
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static void mul_mat_vec_iq2_xxs_q8_1_sycl(const void *vx, const void *vy,
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float *dst, const int ncols,
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const int nrows,
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@ -10664,15 +10641,11 @@ static void mul_mat_vec_iq2_xxs_q8_1_sycl(const void *vx, const void *vy,
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const sycl::range<3> block_nums(1, 1, block_num_y);
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const sycl::range<3> block_dims(1, GGML_SYCL_MMV_Y, WARP_SIZE);
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{
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iq2xxs_grid.init(*stream);
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ksigns_iq2xs.init(*stream);
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kmask_iq2xs.init(*stream);
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stream->submit([&](sycl::handler &cgh) {
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auto iq2xxs_grid_ptr_ct1 = iq2xxs_grid.get_ptr();
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auto ksigns_iq2xs_ptr_ct1 = ksigns_iq2xs.get_ptr();
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auto kmask_iq2xs_ptr_ct1 = kmask_iq2xs.get_ptr();
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auto iq2xxs_grid_ptr_ct1 = &iq2xxs_grid[0];
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auto ksigns_iq2xs_ptr_ct1 = &ksigns_iq2xs[0];
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auto kmask_iq2xs_ptr_ct1 = &kmask_iq2xs[0];
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cgh.parallel_for(
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sycl::nd_range<3>(block_nums * block_dims, block_dims),
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@ -10695,12 +10668,10 @@ static void mul_mat_vec_iq2_xs_q8_1_sycl(const void *vx, const void *vy,
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const sycl::range<3> block_nums(1, 1, block_num_y);
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const sycl::range<3> block_dims(1, GGML_SYCL_MMV_Y, WARP_SIZE);
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{
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iq2xs_grid.init(*stream);
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ksigns64.init(*stream);
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stream->submit([&](sycl::handler &cgh) {
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auto iq2xs_grid_ptr_ct1 = iq2xs_grid.get_ptr();
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auto ksigns64_ptr_ct1 = ksigns64.get_ptr();
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auto iq2xs_grid_ptr_ct1 = &iq2xs_grid[0];
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auto ksigns64_ptr_ct1 = &ksigns64[0];
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cgh.parallel_for(
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sycl::nd_range<3>(block_nums * block_dims, block_dims),
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@ -10723,12 +10694,10 @@ static void mul_mat_vec_iq3_xxs_q8_1_sycl(const void *vx, const void *vy,
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const sycl::range<3> block_nums(1, 1, block_num_y);
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const sycl::range<3> block_dims(1, GGML_SYCL_MMV_Y, WARP_SIZE);
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{
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iq3xxs_grid.init(*stream);
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ksigns64.init(*stream);
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stream->submit([&](sycl::handler &cgh) {
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auto iq3xxs_grid_ptr_ct1 = iq3xxs_grid.get_ptr();
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auto ksigns64_ptr_ct1 = ksigns64.get_ptr();
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auto iq3xxs_grid_ptr_ct1 = &iq3xxs_grid[0];
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auto ksigns64_ptr_ct1 = &ksigns64[0];
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cgh.parallel_for(
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sycl::nd_range<3>(block_nums * block_dims, block_dims),
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@ -10751,12 +10720,10 @@ static void mul_mat_vec_iq3_s_q8_1_sycl(const void *vx, const void *vy,
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const sycl::range<3> block_nums(1, 1, block_num_y);
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const sycl::range<3> block_dims(1, GGML_SYCL_MMV_Y, WARP_SIZE);
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{
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iq3s_grid.init(*stream);
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ksigns64.init(*stream);
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stream->submit([&](sycl::handler &cgh) {
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auto iq3s_grid_ptr_ct1 = iq3s_grid.get_ptr();
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auto ksigns64_ptr_ct1 = ksigns64.get_ptr();
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auto iq3s_grid_ptr_ct1 = &iq3s_grid[0];
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auto ksigns64_ptr_ct1 = &ksigns64[0];
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cgh.parallel_for(
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sycl::nd_range<3>(block_nums * block_dims, block_dims),
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@ -10779,12 +10746,10 @@ static void mul_mat_vec_iq1_s_q8_1_sycl(const void *vx, const void *vy,
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const sycl::range<3> block_nums(1, 1, block_num_y);
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const sycl::range<3> block_dims(1, GGML_SYCL_MMV_Y, WARP_SIZE);
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{
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iq1s_grid_gpu.init(*stream);
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ksigns64.init(*stream);
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stream->submit([&](sycl::handler &cgh) {
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auto iq1s_grid_ptr_ct1 = iq1s_grid_gpu.get_ptr();
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auto ksigns64_ptr_ct1 = ksigns64.get_ptr();
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auto iq1s_grid_ptr_ct1 = &iq1s_grid_gpu[0];
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auto ksigns64_ptr_ct1 = &ksigns64[0];
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cgh.parallel_for(
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sycl::nd_range<3>(block_nums * block_dims, block_dims),
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@ -10797,7 +10762,6 @@ static void mul_mat_vec_iq1_s_q8_1_sycl(const void *vx, const void *vy,
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});
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}
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}
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#endif
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static void ggml_mul_mat_q4_0_q8_1_sycl(const void *vx, const void *vy,
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float *dst, const int ncols_x,
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@ -13630,7 +13594,6 @@ inline void ggml_sycl_op_mul_mat_vec_q(
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case GGML_TYPE_Q6_K:
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mul_mat_vec_q6_K_q8_1_sycl(src0_dd_i, src1_ddq_i, dst_dd_i, ne00, row_diff, stream);
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break;
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#if defined(__gnu_linux__)
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case GGML_TYPE_IQ2_XXS:
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mul_mat_vec_iq2_xxs_q8_1_sycl(src0_dd_i, src1_ddq_i, dst_dd_i, ne00, row_diff, stream);
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break;
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@ -13646,7 +13609,6 @@ inline void ggml_sycl_op_mul_mat_vec_q(
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case GGML_TYPE_IQ1_S:
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mul_mat_vec_iq1_s_q8_1_sycl(src0_dd_i, src1_ddq_i, dst_dd_i, ne00, row_diff, stream);
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break;
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#endif
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default:
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GGML_ASSERT(false);
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break;
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@ -17027,13 +16989,6 @@ GGML_CALL static bool ggml_backend_sycl_supports_op(ggml_backend_t backend, cons
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a_type == GGML_TYPE_IQ4_XS) {
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return false;
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}
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#if defined(__gnu_linux__)
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if (a_type == GGML_TYPE_IQ2_XXS || a_type == GGML_TYPE_IQ2_XS ||
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a_type == GGML_TYPE_IQ3_XXS || a_type == GGML_TYPE_IQ3_S ||
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a_type == GGML_TYPE_IQ1_S) {
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return false;
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}
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#endif
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return true;
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} break;
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case GGML_OP_GET_ROWS:
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