falcon : add CUDA offloading (#2739)
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1 changed files with 101 additions and 11 deletions
112
llama.cpp
112
llama.cpp
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@ -1860,31 +1860,54 @@ static void llm_load_tensors(
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// output
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{
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model.output_norm = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT_NORM, "weight"), {n_embd}, GGML_BACKEND_CPU);
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model.output_norm_b = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT_NORM, "bias"), {n_embd}, GGML_BACKEND_CPU);
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model.output = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT, "weight"), {n_embd, n_vocab}, GGML_BACKEND_CPU);
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ggml_backend backend_norm;
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ggml_backend backend_output;
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if (n_gpu_layers > int(n_layer)) {
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// norm is not performance relevant on its own but keeping it in VRAM reduces data copying
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// on Windows however this is detrimental unless everything is on the GPU
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#ifndef _WIN32
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backend_norm = low_vram ? GGML_BACKEND_CPU : LLAMA_BACKEND_OFFLOAD;
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#else
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backend_norm = low_vram || n_gpu_layers <= (int) n_layer + 2 ? GGML_BACKEND_CPU : LLAMA_BACKEND_OFFLOAD;
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#endif // _WIN32
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backend_output = LLAMA_BACKEND_OFFLOAD_SPLIT;
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} else {
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backend_norm = GGML_BACKEND_CPU;
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backend_output = GGML_BACKEND_CPU;
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}
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model.output_norm = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT_NORM, "weight"), {n_embd}, backend_norm);
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model.output_norm_b = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT_NORM, "bias"), {n_embd}, backend_norm);
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model.output = ml.create_tensor(ctx, tn(LLM_TENSOR_OUTPUT, "weight"), {n_embd, n_vocab}, backend_output);
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}
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const uint32_t n_ff = hparams.n_ff;
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const int i_gpu_start = n_layer - n_gpu_layers;
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model.layers.resize(n_layer);
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for (uint32_t i = 0; i < n_layer; ++i) {
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const ggml_backend backend = int(i) < i_gpu_start ? GGML_BACKEND_CPU : LLAMA_BACKEND_OFFLOAD; // NOLINT
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const ggml_backend backend_split = int(i) < i_gpu_start ? GGML_BACKEND_CPU : LLAMA_BACKEND_OFFLOAD_SPLIT; // NOLINT
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auto & layer = model.layers[i];
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layer.attn_norm = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM, "weight", i), {n_embd}, GGML_BACKEND_CPU);
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layer.attn_norm_b = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM, "bias", i), {n_embd}, GGML_BACKEND_CPU);
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layer.attn_norm = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM, "weight", i), {n_embd}, backend);
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layer.attn_norm_b = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM, "bias", i), {n_embd}, backend);
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if (gguf_find_tensor(ml.ctx_gguf, tn(LLM_TENSOR_ATTN_NORM_2, "weight", i).c_str()) >= 0) {
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layer.attn_norm_2 = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM_2, "weight", i), {n_embd}, GGML_BACKEND_CPU);
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layer.attn_norm_2_b = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM_2, "bias", i), {n_embd}, GGML_BACKEND_CPU);
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layer.attn_norm_2 = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM_2, "weight", i), {n_embd}, backend);
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layer.attn_norm_2_b = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_NORM_2, "bias", i), {n_embd}, backend);
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}
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layer.wqkv = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_QKV, "weight", i), {n_embd, n_embd + 2*n_embd_gqa}, GGML_BACKEND_CPU);
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layer.wo = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_OUT, "weight", i), {n_embd, n_embd}, GGML_BACKEND_CPU);
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layer.wqkv = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_QKV, "weight", i), {n_embd, n_embd + 2*n_embd_gqa}, backend_split);
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layer.wo = ml.create_tensor(ctx, tn(LLM_TENSOR_ATTN_OUT, "weight", i), {n_embd, n_embd}, backend_split);
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layer.w2 = ml.create_tensor(ctx, tn(LLM_TENSOR_FFN_DOWN, "weight", i), { n_ff, n_embd}, GGML_BACKEND_CPU);
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layer.w3 = ml.create_tensor(ctx, tn(LLM_TENSOR_FFN_UP, "weight", i), {n_embd, n_ff}, GGML_BACKEND_CPU);
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layer.w2 = ml.create_tensor(ctx, tn(LLM_TENSOR_FFN_DOWN, "weight", i), { n_ff, n_embd}, backend_split);
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layer.w3 = ml.create_tensor(ctx, tn(LLM_TENSOR_FFN_UP, "weight", i), {n_embd, n_ff}, backend_split);
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}
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} break;
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default:
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@ -2390,6 +2413,8 @@ static struct ggml_cgraph * llm_build_falcon(
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const float freq_scale = hparams.rope_freq_scale;
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const float norm_eps = hparams.f_norm_eps;
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const int n_gpu_layers = model.n_gpu_layers;
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auto & buf_compute = lctx.buf_compute;
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struct ggml_init_params params = {
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@ -2430,6 +2455,30 @@ static struct ggml_cgraph * llm_build_falcon(
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}
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}
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const int i_gpu_start = n_layer - n_gpu_layers;
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(void) i_gpu_start;
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// offload functions set the tensor output backend to GPU
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// tensors are GPU-accelerated if any input or the output has been offloaded
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//
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// with the low VRAM option VRAM scratch is disabled in llama_load_model_internal
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// in that case ggml_cuda_assign_buffers has no effect
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offload_func_t offload_func_nr = llama_nop; // nr = non-repeating
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offload_func_t offload_func_kq = llama_nop;
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offload_func_t offload_func_v = llama_nop;
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#ifdef GGML_USE_CUBLAS
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if (n_gpu_layers > n_layer) {
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offload_func_nr = ggml_cuda_assign_buffers_no_alloc;
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}
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if (n_gpu_layers > n_layer + 1) {
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offload_func_v = ggml_cuda_assign_buffers_no_alloc;
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}
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if (n_gpu_layers > n_layer + 2) {
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offload_func_kq = ggml_cuda_assign_buffers_no_alloc;
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}
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#endif // GGML_USE_CUBLAS
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struct ggml_tensor * KQ_scale = ggml_new_tensor_1d(ctx0, GGML_TYPE_F32, 1);
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ggml_allocr_alloc(lctx.alloc, KQ_scale);
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if (!ggml_allocr_is_measure(lctx.alloc)) {
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@ -2440,21 +2489,35 @@ static struct ggml_cgraph * llm_build_falcon(
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for (int il = 0; il < n_layer; ++il) {
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struct ggml_tensor * attn_norm;
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offload_func_t offload_func = llama_nop;
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#ifdef GGML_USE_CUBLAS
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if (il >= i_gpu_start) {
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offload_func = ggml_cuda_assign_buffers_no_alloc;
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}
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#endif // GGML_USE_CUBLAS
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// self-attention
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// TODO: refactor into common function (shared with LLaMA)
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{
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attn_norm = ggml_norm(ctx0, inpL, norm_eps);
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offload_func(attn_norm);
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attn_norm = ggml_add(ctx0,
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ggml_mul(ctx0, attn_norm, model.layers[il].attn_norm),
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model.layers[il].attn_norm_b);
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offload_func(attn_norm->src[0]);
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offload_func(attn_norm);
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if (model.layers[il].attn_norm_2) { // Falcon-40B
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cur = ggml_norm(ctx0, inpL, norm_eps);
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offload_func(cur);
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cur = ggml_add(ctx0,
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ggml_mul(ctx0, cur, model.layers[il].attn_norm_2),
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model.layers[il].attn_norm_2_b);
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offload_func(cur->src[0]);
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offload_func(cur);
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} else { // Falcon 7B
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cur = attn_norm;
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}
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@ -2462,6 +2525,7 @@ static struct ggml_cgraph * llm_build_falcon(
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// compute QKV
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cur = ggml_mul_mat(ctx0, model.layers[il].wqkv, cur);
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offload_func_kq(cur);
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// Note that the strides for Kcur, Vcur are set up so that the
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// resulting views are misaligned with the tensor's storage
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@ -2479,39 +2543,49 @@ static struct ggml_cgraph * llm_build_falcon(
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wsize * n_embd_head,
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wsize * n_embd_head * (n_head + 2 * n_head_kv),
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0);
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offload_func_kq(tmpq);
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struct ggml_tensor * tmpk = ggml_view_3d(
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ctx0, cur, n_embd_head, n_head_kv, N,
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wsize * n_embd_head,
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wsize * n_embd_head * (n_head + 2 * n_head_kv),
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wsize * n_embd_head * n_head);
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offload_func_kq(tmpk);
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struct ggml_tensor * tmpv = ggml_view_3d(
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ctx0, cur, n_embd_head, n_head_kv, N,
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wsize * n_embd_head,
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wsize * n_embd_head * (n_head + 2 * n_head_kv),
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wsize * n_embd_head * (n_head + n_head_kv));
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offload_func_v(tmpv);
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// using mode = 2 for neox mode
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struct ggml_tensor * Qcur = ggml_rope_custom_inplace(ctx0, tmpq, n_past, n_embd_head, 2, 0, freq_base, freq_scale);
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offload_func_kq(Qcur);
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struct ggml_tensor * Kcur = ggml_rope_custom_inplace(ctx0, tmpk, n_past, n_embd_head, 2, 0, freq_base, freq_scale);
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offload_func_kq(Kcur);
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{
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struct ggml_tensor * Vcur = ggml_transpose(ctx0, ggml_reshape_2d(ctx0, ggml_cont(ctx0, tmpv), n_embd_gqa, N));
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offload_func_v(Vcur);
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offload_func_v(Vcur->src[0]->src[0]);
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ggml_set_name(Vcur, "Vcur");
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struct ggml_tensor * k = ggml_view_1d(ctx0, kv_self.k, N*n_embd_gqa, (ggml_element_size(kv_self.k)*n_embd_gqa)*(il*n_ctx + n_past));
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offload_func_kq(k);
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ggml_set_name(k, "k");
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struct ggml_tensor * v = ggml_view_2d(ctx0, kv_self.v, N, n_embd_gqa,
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( n_ctx)*ggml_element_size(kv_self.v),
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(il*n_ctx)*ggml_element_size(kv_self.v)*n_embd_gqa + n_past*ggml_element_size(kv_self.v));
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offload_func_v(v);
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ggml_build_forward_expand(gf, ggml_cpy(ctx0, Kcur, k));
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ggml_build_forward_expand(gf, ggml_cpy(ctx0, Vcur, v));
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}
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struct ggml_tensor * Q = ggml_permute(ctx0, Qcur, 0, 2, 1, 3);
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offload_func_kq(Q);
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ggml_set_name(Q, "Q");
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struct ggml_tensor * K =
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@ -2520,18 +2594,23 @@ static struct ggml_cgraph * llm_build_falcon(
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ggml_element_size(kv_self.k)*n_embd_gqa,
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ggml_element_size(kv_self.k)*n_embd_head,
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ggml_element_size(kv_self.k)*n_embd_gqa*n_ctx*il);
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offload_func_kq(K);
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ggml_set_name(K, "K");
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struct ggml_tensor * KQ = ggml_mul_mat(ctx0, K, Q);
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offload_func_kq(KQ);
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ggml_set_name(KQ, "KQ");
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struct ggml_tensor * KQ_scaled = ggml_scale_inplace(ctx0, KQ, KQ_scale);
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offload_func_kq(KQ_scaled);
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ggml_set_name(KQ_scaled, "KQ_scaled");
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struct ggml_tensor * KQ_masked = ggml_diag_mask_inf_inplace(ctx0, KQ_scaled, n_past);
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offload_func_kq(KQ_masked);
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ggml_set_name(KQ_masked, "KQ_masked");
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struct ggml_tensor * KQ_soft_max = ggml_soft_max_inplace(ctx0, KQ_masked);
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offload_func_v(KQ_soft_max);
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ggml_set_name(KQ_soft_max, "KQ_soft_max");
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struct ggml_tensor * V =
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@ -2540,18 +2619,23 @@ static struct ggml_cgraph * llm_build_falcon(
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ggml_element_size(kv_self.v)*n_ctx,
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ggml_element_size(kv_self.v)*n_ctx*n_embd_head,
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ggml_element_size(kv_self.v)*n_ctx*n_embd_gqa*il);
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offload_func_v(V);
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ggml_set_name(V, "V");
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struct ggml_tensor * KQV = ggml_mul_mat(ctx0, V, KQ_soft_max);
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offload_func_v(KQV);
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ggml_set_name(KQV, "KQV");
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struct ggml_tensor * KQV_merged = ggml_permute(ctx0, KQV, 0, 2, 1, 3);
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offload_func_v(KQV_merged);
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ggml_set_name(KQV_merged, "KQV_merged");
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cur = ggml_cpy(ctx0, KQV_merged, ggml_new_tensor_2d(ctx0, GGML_TYPE_F32, n_embd, N));
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offload_func_v(cur);
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ggml_set_name(cur, "KQV_merged_contiguous");
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cur = ggml_mul_mat(ctx0, model.layers[il].wo, cur);
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offload_func(cur);
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ggml_set_name(cur, "result_wo");
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}
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@ -2567,13 +2651,18 @@ static struct ggml_cgraph * llm_build_falcon(
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// adding this, because there seems to be a bug in the Metal concurrency optimization
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// without this line, the results are non-deterministic and wrong
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cur->src[2] = attn_out;
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offload_func(cur);
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cur = ggml_gelu(ctx0, cur);
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offload_func(cur);
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cur = ggml_mul_mat(ctx0, model.layers[il].w2, cur);
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offload_func(cur);
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}
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cur = ggml_add(ctx0, cur, attn_out);
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offload_func(cur);
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cur = ggml_add(ctx0, cur, inpL);
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offload_func(cur);
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// input for next layer
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inpL = cur;
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@ -2584,6 +2673,7 @@ static struct ggml_cgraph * llm_build_falcon(
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// norm
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{
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cur = ggml_norm(ctx0, cur, norm_eps);
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offload_func_nr(cur);
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cur = ggml_add(ctx0,
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ggml_mul(ctx0, cur, model.output_norm),
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