1731d4238f
* add onednn * add sycl_f16 * add dnnl stream * add engine map * use dnnl for intel only * use fp16fp16fp16 * update doc
101 lines
3.7 KiB
C++
101 lines
3.7 KiB
C++
//
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// MIT license
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// Copyright (C) 2024 Intel Corporation
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// SPDX-License-Identifier: MIT
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//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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#ifndef GGML_SYCL_GEMM_HPP
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#define GGML_SYCL_GEMM_HPP
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#include <fstream>
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#include <iostream>
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#include "ggml-sycl.h"
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#if GGML_SYCL_DNNL
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#include "dnnl.hpp"
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#include "dnnl_sycl.hpp"
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class DnnlGemmWrapper {
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public:
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using dt = dnnl::memory::data_type;
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using tag = dnnl::memory::format_tag;
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template<typename T>
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static constexpr dt to_dt() {
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if constexpr (std::is_same_v<T, float>) return dt::f32;
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else if constexpr (std::is_same_v<T, sycl::half>) return dt::f16;
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else static_assert(0);
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}
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static inline void row_gemm(sycl::queue& q, bool a_trans,
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bool b_trans, int m, int n, int k,
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const void* a, dt at, const void* b, dt bt, void* c, dt ct)
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{
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// Get the device associated with the queue
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sycl::device dev = q.get_device();
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// Get the context associated with the queue
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sycl::context ctx = q.get_context();
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const dnnl::engine eng = dnnl::sycl_interop::make_engine(dev, ctx);
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const dnnl::stream stream = dnnl::sycl_interop::make_stream(eng, q);
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dnnl::memory::dims a_dims = { m, k };
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dnnl::memory::dims b_dims = { k, n };
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dnnl::memory::dims c_dims = { m, n };
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const auto a_in_md = dnnl::memory::desc(a_dims, at, a_trans ? tag::ba : tag::ab);
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const auto b_in_md = dnnl::memory::desc(b_dims, bt, b_trans ? tag::ba : tag::ab);
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const auto c_md = dnnl::memory::desc(c_dims, ct, tag::ab);
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auto a_mem = dnnl::memory(a_in_md, eng, (void*)a);
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auto b_mem = dnnl::memory(b_in_md, eng, (void*)b);
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auto matmul_pd = dnnl::matmul::primitive_desc(eng, a_in_md, b_in_md, c_md);
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auto c_mem = dnnl::memory(matmul_pd.dst_desc(), eng, c);
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// Create the primitive.
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auto matmul_prim = dnnl::matmul(matmul_pd);
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// Primitive arguments.
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std::unordered_map<int, dnnl::memory> matmul_args;
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matmul_args.insert({ DNNL_ARG_SRC, a_mem });
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matmul_args.insert({ DNNL_ARG_WEIGHTS, b_mem });
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matmul_args.insert({ DNNL_ARG_DST, c_mem });
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matmul_prim.execute(stream, matmul_args);
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}
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static inline void row_gemm(const dnnl::stream& stream, bool a_trans,
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bool b_trans, int m, int n, int k,
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const void* a, dt at, const void* b, dt bt, void* c, dt ct)
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{
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auto const eng = stream.get_engine();
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dnnl::memory::dims a_dims = { m, k };
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dnnl::memory::dims b_dims = { k, n };
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dnnl::memory::dims c_dims = { m, n };
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const auto a_in_md = dnnl::memory::desc(a_dims, at, a_trans ? tag::ba : tag::ab);
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const auto b_in_md = dnnl::memory::desc(b_dims, bt, b_trans ? tag::ba : tag::ab);
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const auto c_md = dnnl::memory::desc(c_dims, ct, tag::ab);
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auto a_mem = dnnl::memory(a_in_md, eng, (void*)a);
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auto b_mem = dnnl::memory(b_in_md, eng, (void*)b);
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auto matmul_pd = dnnl::matmul::primitive_desc(eng, a_in_md, b_in_md, c_md);
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auto c_mem = dnnl::memory(matmul_pd.dst_desc(), eng, c);
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// Create the primitive.
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auto matmul_prim = dnnl::matmul(matmul_pd);
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// Primitive arguments.
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std::unordered_map<int, dnnl::memory> matmul_args;
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matmul_args.insert({ DNNL_ARG_SRC, a_mem });
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matmul_args.insert({ DNNL_ARG_WEIGHTS, b_mem });
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matmul_args.insert({ DNNL_ARG_DST, c_mem });
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matmul_prim.execute(stream, matmul_args);
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}
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};
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#endif
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#endif // GGML_SYCL_GEMM_HPP
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