2019-05-19 12:07:45 +00:00
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# SPDX-License-Identifier: GPL-2.0-only
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2007-07-16 06:39:36 +00:00
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menuconfig CRYPTO_HW
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bool "Hardware crypto devices"
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default y
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2020-06-13 16:50:22 +00:00
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help
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2007-08-18 10:56:21 +00:00
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Say Y here to get to see options for hardware crypto devices and
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processors. This option alone does not add any kernel code.
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If you say N, all options in this submenu will be skipped and disabled.
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2007-07-16 06:39:36 +00:00
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if CRYPTO_HW
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2005-04-16 22:20:36 +00:00
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2019-10-23 20:05:03 +00:00
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source "drivers/crypto/allwinner/Kconfig"
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2005-04-16 22:20:36 +00:00
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config CRYPTO_DEV_PADLOCK
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2007-05-18 03:17:22 +00:00
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tristate "Support for VIA PadLock ACE"
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2009-04-22 05:00:15 +00:00
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depends on X86 && !UML
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2005-04-16 22:20:36 +00:00
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help
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Some VIA processors come with an integrated crypto engine
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(so called VIA PadLock ACE, Advanced Cryptography Engine)
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2006-08-06 12:46:20 +00:00
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that provides instructions for very fast cryptographic
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operations with supported algorithms.
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2005-04-16 22:20:36 +00:00
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The instructions are used only when the CPU supports them.
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2006-08-06 12:50:30 +00:00
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Otherwise software encryption is used.
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2005-04-16 22:20:36 +00:00
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config CRYPTO_DEV_PADLOCK_AES
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2006-08-06 12:46:20 +00:00
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tristate "PadLock driver for AES algorithm"
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2005-04-16 22:20:36 +00:00
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depends on CRYPTO_DEV_PADLOCK
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2019-07-02 19:41:25 +00:00
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select CRYPTO_LIB_AES
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2005-04-16 22:20:36 +00:00
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help
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Use VIA PadLock for AES algorithm.
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2006-08-06 12:46:20 +00:00
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Available in VIA C3 and newer CPUs.
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If unsure say M. The compiled module will be
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2009-06-04 22:44:53 +00:00
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called padlock-aes.
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2006-08-06 12:46:20 +00:00
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2006-07-12 02:29:38 +00:00
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config CRYPTO_DEV_PADLOCK_SHA
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tristate "PadLock driver for SHA1 and SHA256 algorithms"
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depends on CRYPTO_DEV_PADLOCK
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2009-07-11 10:16:16 +00:00
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select CRYPTO_HASH
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2006-07-12 02:29:38 +00:00
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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help
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Use VIA PadLock for SHA1/SHA256 algorithms.
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Available in VIA C7 and newer processors.
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If unsure say M. The compiled module will be
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2009-06-04 22:44:53 +00:00
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called padlock-sha.
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2006-07-12 02:29:38 +00:00
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2006-10-04 08:48:57 +00:00
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config CRYPTO_DEV_GEODE
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tristate "Support for the Geode LX AES engine"
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2007-05-02 12:08:26 +00:00
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depends on X86_32 && PCI
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2006-10-04 08:48:57 +00:00
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select CRYPTO_ALGAPI
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2006-10-04 08:48:57 +00:00
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help
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Say 'Y' here to use the AMD Geode LX processor on-board AES
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2007-05-09 05:12:20 +00:00
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engine for the CryptoAPI AES algorithm.
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2006-10-04 08:48:57 +00:00
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To compile this driver as a module, choose M here: the module
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will be called geode-aes.
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2007-05-10 13:46:00 +00:00
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config ZCRYPT
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2017-02-20 15:09:51 +00:00
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tristate "Support for s390 cryptographic adapters"
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2007-05-10 13:46:00 +00:00
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depends on S390
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2008-04-17 05:46:15 +00:00
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select HW_RANDOM
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2007-05-10 13:46:00 +00:00
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help
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2017-02-20 15:09:51 +00:00
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Select this option if you want to enable support for
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2023-06-28 10:36:08 +00:00
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s390 cryptographic adapters like Crypto Express 4 up
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to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)
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or Accelerator (CEXxA) mode.
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2020-09-23 07:18:38 +00:00
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config ZCRYPT_DEBUG
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bool "Enable debug features for s390 cryptographic adapters"
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default n
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depends on DEBUG_KERNEL
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depends on ZCRYPT
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help
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Say 'Y' here to enable some additional debug features on the
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s390 cryptographic adapters driver.
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There will be some more sysfs attributes displayed for ap cards
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and queues and some flags on crypto requests are interpreted as
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debugging messages to force error injection.
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Do not enable on production level kernel build.
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If unsure, say N.
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2007-05-10 13:46:00 +00:00
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2016-11-02 13:37:20 +00:00
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config PKEY
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tristate "Kernel API for protected key handling"
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depends on S390
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depends on ZCRYPT
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help
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With this option enabled the pkey kernel module provides an API
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for creation and handling of protected keys. Other parts of the
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kernel or userspace applications may use these functions.
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Select this option if you want to enable the kernel and userspace
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API for proteced key handling.
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Please note that creation of protected keys from secure keys
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requires to have at least one CEX card in coprocessor mode
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available at runtime.
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2007-05-10 13:46:00 +00:00
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2017-05-11 15:15:54 +00:00
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config CRYPTO_PAES_S390
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tristate "PAES cipher algorithms"
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depends on S390
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depends on ZCRYPT
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depends on PKEY
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select CRYPTO_ALGAPI
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2017-05-11 15:15:54 +00:00
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help
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This is the s390 hardware accelerated implementation of the
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AES cipher algorithms for use with protected key.
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Select this option if you want to use the paes cipher
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for example to use protected key encrypted devices.
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2008-01-26 13:11:07 +00:00
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config S390_PRNG
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tristate "Pseudo random number generator device driver"
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depends on S390
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default "m"
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help
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Select this option if you want to use the s390 pseudo random number
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generator. The PRNG is part of the cryptographic processor functions
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and uses triple-DES to generate secure random numbers like the
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2011-04-19 19:29:19 +00:00
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ANSI X9.17 standard. User-space programs access the
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pseudo-random-number device through the char device /dev/prandom.
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It is available as of z9.
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2008-01-26 13:11:07 +00:00
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2010-05-19 04:14:04 +00:00
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config CRYPTO_DEV_NIAGARA2
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2019-11-21 03:20:48 +00:00
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tristate "Niagara2 Stream Processing Unit driver"
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select CRYPTO_LIB_DES
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select CRYPTO_SKCIPHER
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select CRYPTO_HASH
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select CRYPTO_MD5
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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depends on SPARC64
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help
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2010-05-19 04:14:04 +00:00
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Each core of a Niagara2 processor contains a Stream
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Processing Unit, which itself contains several cryptographic
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sub-units. One set provides the Modular Arithmetic Unit,
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used for SSL offload. The other set provides the Cipher
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Group, which can perform encryption, decryption, hashing,
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checksumming, and raw copies.
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2021-06-01 15:11:29 +00:00
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config CRYPTO_DEV_SL3516
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2021-06-25 13:27:23 +00:00
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tristate "Storlink SL3516 crypto offloader"
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2021-06-25 13:27:24 +00:00
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depends on ARCH_GEMINI || COMPILE_TEST
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depends on HAS_IOMEM && PM
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2021-06-01 15:11:29 +00:00
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select CRYPTO_SKCIPHER
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select CRYPTO_ENGINE
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select CRYPTO_ECB
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select CRYPTO_AES
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select HW_RANDOM
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help
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This option allows you to have support for SL3516 crypto offloader.
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config CRYPTO_DEV_SL3516_DEBUG
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bool "Enable SL3516 stats"
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depends on CRYPTO_DEV_SL3516
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depends on DEBUG_FS
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help
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Say y to enable SL3516 debug stats.
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This will create /sys/kernel/debug/sl3516/stats for displaying
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the number of requests per algorithm and other internal stats.
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2007-10-26 13:31:14 +00:00
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config CRYPTO_DEV_HIFN_795X
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tristate "Driver HIFN 795x crypto accelerator chips"
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2019-08-15 09:01:09 +00:00
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select CRYPTO_LIB_DES
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2008-01-25 22:48:44 +00:00
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select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
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2007-11-12 13:56:38 +00:00
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depends on PCI
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2011-10-10 10:55:41 +00:00
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depends on !ARCH_DMA_ADDR_T_64BIT
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2007-10-26 13:31:14 +00:00
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help
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This option allows you to have support for HIFN 795x crypto adapters.
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2008-01-25 22:48:44 +00:00
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config CRYPTO_DEV_HIFN_795X_RNG
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bool "HIFN 795x random number generator"
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depends on CRYPTO_DEV_HIFN_795X
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help
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Select this option if you want to enable the random number generator
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on the HIFN 795x crypto adapters.
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2007-10-26 13:31:14 +00:00
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2018-12-11 11:01:04 +00:00
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source "drivers/crypto/caam/Kconfig"
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2011-03-13 08:54:26 +00:00
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2008-06-23 11:50:15 +00:00
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config CRYPTO_DEV_TALITOS
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tristate "Talitos Freescale Security Engine (SEC)"
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2015-06-17 06:58:24 +00:00
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select CRYPTO_AEAD
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2008-06-23 11:50:15 +00:00
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select CRYPTO_AUTHENC
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2015-06-17 06:58:24 +00:00
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select CRYPTO_HASH
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2019-11-26 11:28:36 +00:00
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select CRYPTO_LIB_DES
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2008-06-23 11:50:15 +00:00
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select HW_RANDOM
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depends on FSL_SOC
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help
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Say 'Y' here to use the Freescale Security Engine (SEC)
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to offload cryptographic algorithm computation.
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The Freescale SEC is present on PowerQUICC 'E' processors, such
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as the MPC8349E and MPC8548E.
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To compile this driver as a module, choose M here: the module
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will be called talitos.
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2015-04-17 14:32:03 +00:00
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config CRYPTO_DEV_TALITOS1
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bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
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depends on CRYPTO_DEV_TALITOS
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depends on PPC_8xx || PPC_82xx
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default y
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help
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Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
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found on MPC82xx or the Freescale Security Engine (SEC Lite)
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version 1.2 found on MPC8xx
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config CRYPTO_DEV_TALITOS2
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bool "SEC2+ (SEC version 2.0 or upper)"
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depends on CRYPTO_DEV_TALITOS
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default y if !PPC_8xx
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help
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Say 'Y' here to use the Freescale Security Engine (SEC)
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version 2 and following as found on MPC83xx, MPC85xx, etc ...
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2009-02-05 05:18:13 +00:00
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config CRYPTO_DEV_PPC4XX
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tristate "Driver AMCC PPC4xx crypto accelerator"
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depends on PPC && 4xx
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select CRYPTO_HASH
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2017-10-03 23:00:15 +00:00
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select CRYPTO_AEAD
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2019-10-27 15:47:47 +00:00
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select CRYPTO_AES
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2019-07-02 19:41:42 +00:00
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select CRYPTO_LIB_AES
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2017-10-03 23:00:15 +00:00
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select CRYPTO_CCM
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2018-04-19 16:41:54 +00:00
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select CRYPTO_CTR
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2017-10-03 23:00:15 +00:00
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select CRYPTO_GCM
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2009-02-05 05:18:13 +00:00
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help
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This option allows you to have support for AMCC crypto acceleration.
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2016-04-18 10:57:41 +00:00
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config HW_RANDOM_PPC4XX
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bool "PowerPC 4xx generic true random number generator support"
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2021-01-30 22:55:38 +00:00
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depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
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2016-04-18 10:57:41 +00:00
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default y
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2020-06-13 16:50:22 +00:00
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help
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2016-04-18 10:57:41 +00:00
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This option provides the kernel-side support for the TRNG hardware
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found in the security function of some PowerPC 4xx SoCs.
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2017-05-24 07:35:26 +00:00
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config CRYPTO_DEV_OMAP
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tristate "Support for OMAP crypto HW accelerators"
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depends on ARCH_OMAP2PLUS
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help
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OMAP processors have various crypto HW accelerators. Select this if
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2019-11-21 03:20:48 +00:00
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you want to use the OMAP modules for any of the crypto algorithms.
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2017-05-24 07:35:26 +00:00
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if CRYPTO_DEV_OMAP
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2010-05-03 03:10:59 +00:00
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config CRYPTO_DEV_OMAP_SHAM
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2013-07-26 06:59:14 +00:00
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tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
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depends on ARCH_OMAP2PLUS
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2021-01-03 14:03:04 +00:00
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select CRYPTO_ENGINE
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2010-05-03 03:10:59 +00:00
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select CRYPTO_SHA1
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select CRYPTO_MD5
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2013-07-26 06:59:14 +00:00
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select CRYPTO_SHA256
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select CRYPTO_SHA512
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select CRYPTO_HMAC
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2010-05-03 03:10:59 +00:00
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help
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2013-07-26 06:59:14 +00:00
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OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
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want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
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2010-05-03 03:10:59 +00:00
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2010-09-03 11:16:02 +00:00
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config CRYPTO_DEV_OMAP_AES
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tristate "Support for OMAP AES hw engine"
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2013-08-18 02:42:35 +00:00
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depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
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2010-09-03 11:16:02 +00:00
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select CRYPTO_AES
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2019-10-25 19:41:13 +00:00
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select CRYPTO_SKCIPHER
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2016-01-26 12:25:40 +00:00
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select CRYPTO_ENGINE
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2016-08-04 10:28:44 +00:00
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select CRYPTO_CBC
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select CRYPTO_ECB
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select CRYPTO_CTR
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2017-05-24 07:35:31 +00:00
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select CRYPTO_AEAD
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2010-09-03 11:16:02 +00:00
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help
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OMAP processors have AES module accelerator. Select this if you
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want to use the OMAP module for AES algorithms.
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2014-02-14 16:49:47 +00:00
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config CRYPTO_DEV_OMAP_DES
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2016-03-13 15:15:37 +00:00
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tristate "Support for OMAP DES/3DES hw engine"
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2014-02-14 16:49:47 +00:00
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depends on ARCH_OMAP2PLUS
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2019-08-15 09:01:09 +00:00
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select CRYPTO_LIB_DES
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2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2016-04-28 06:11:51 +00:00
|
|
|
select CRYPTO_ENGINE
|
2014-02-14 16:49:47 +00:00
|
|
|
help
|
|
|
|
OMAP processors have DES/3DES module accelerator. Select this if you
|
|
|
|
want to use the OMAP module for DES and 3DES algorithms. Currently
|
2016-03-13 15:15:37 +00:00
|
|
|
the ECB and CBC modes of operation are supported by the driver. Also
|
|
|
|
accesses made on unaligned boundaries are supported.
|
2014-02-14 16:49:47 +00:00
|
|
|
|
2017-05-24 07:35:26 +00:00
|
|
|
endif # CRYPTO_DEV_OMAP
|
|
|
|
|
2013-03-01 11:37:53 +00:00
|
|
|
config CRYPTO_DEV_SAHARA
|
|
|
|
tristate "Support for SAHARA crypto accelerator"
|
2013-05-12 11:57:19 +00:00
|
|
|
depends on ARCH_MXC && OF
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2013-03-01 11:37:53 +00:00
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ECB
|
|
|
|
help
|
|
|
|
This option enables support for the SAHARA HW crypto accelerator
|
|
|
|
found in some Freescale i.MX chips.
|
|
|
|
|
2017-04-11 18:08:35 +00:00
|
|
|
config CRYPTO_DEV_EXYNOS_RNG
|
2020-01-04 15:20:59 +00:00
|
|
|
tristate "Exynos HW pseudo random number generator support"
|
2017-04-11 18:08:35 +00:00
|
|
|
depends on ARCH_EXYNOS || COMPILE_TEST
|
|
|
|
depends on HAS_IOMEM
|
|
|
|
select CRYPTO_RNG
|
2020-06-13 16:50:22 +00:00
|
|
|
help
|
2017-04-11 18:08:35 +00:00
|
|
|
This driver provides kernel-side support through the
|
|
|
|
cryptographic API for the pseudo random number generator hardware
|
|
|
|
found on Exynos SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the
|
|
|
|
module will be called exynos-rng.
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
2011-04-08 12:40:51 +00:00
|
|
|
config CRYPTO_DEV_S5P
|
2014-05-08 13:58:14 +00:00
|
|
|
tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
|
2016-03-14 04:20:18 +00:00
|
|
|
depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
|
2018-04-17 17:49:03 +00:00
|
|
|
depends on HAS_IOMEM
|
2011-04-08 12:40:51 +00:00
|
|
|
select CRYPTO_AES
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2011-04-08 12:40:51 +00:00
|
|
|
help
|
|
|
|
This option allows you to have support for S5P crypto acceleration.
|
2014-05-08 13:58:14 +00:00
|
|
|
Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
|
2011-04-08 12:40:51 +00:00
|
|
|
algorithms execution.
|
|
|
|
|
2017-10-25 15:27:35 +00:00
|
|
|
config CRYPTO_DEV_EXYNOS_HASH
|
|
|
|
bool "Support for Samsung Exynos HASH accelerator"
|
|
|
|
depends on CRYPTO_DEV_S5P
|
|
|
|
depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
help
|
|
|
|
Select this to offload Exynos from HASH MD5/SHA1/SHA256.
|
|
|
|
This will select software SHA1, MD5 and SHA256 as they are
|
|
|
|
needed for small and zero-size messages.
|
|
|
|
HASH algorithms will be disabled if EXYNOS_RNG
|
|
|
|
is enabled due to hw conflict.
|
|
|
|
|
2012-04-12 05:39:26 +00:00
|
|
|
config CRYPTO_DEV_NX
|
2015-05-07 17:49:17 +00:00
|
|
|
bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
|
|
|
|
depends on PPC64
|
2012-04-12 05:39:26 +00:00
|
|
|
help
|
2015-05-07 17:49:17 +00:00
|
|
|
This enables support for the NX hardware cryptographic accelerator
|
|
|
|
coprocessor that is in IBM PowerPC P7+ or later processors. This
|
|
|
|
does not actually enable any drivers, it only allows you to select
|
|
|
|
which acceleration type (encryption and/or compression) to enable.
|
2012-07-19 14:42:38 +00:00
|
|
|
|
|
|
|
if CRYPTO_DEV_NX
|
|
|
|
source "drivers/crypto/nx/Kconfig"
|
|
|
|
endif
|
2012-04-12 05:39:26 +00:00
|
|
|
|
2017-01-26 16:07:56 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_AUTHENC
|
2019-11-13 09:55:50 +00:00
|
|
|
bool "Support for Atmel IPSEC/SSL hw accelerator"
|
2017-02-06 12:32:15 +00:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2019-11-13 09:55:50 +00:00
|
|
|
depends on CRYPTO_DEV_ATMEL_AES
|
2017-01-26 16:07:56 +00:00
|
|
|
help
|
|
|
|
Some Atmel processors can combine the AES and SHA hw accelerators
|
|
|
|
to enhance support of IPSEC/SSL.
|
|
|
|
Select this if you want to use the Atmel modules for
|
|
|
|
authenc(hmac(shaX),Y(cbc)) algorithms.
|
|
|
|
|
2012-07-01 17:19:44 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_AES
|
|
|
|
tristate "Support for Atmel AES hw accelerator"
|
2017-02-06 12:32:15 +00:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2012-07-01 17:19:44 +00:00
|
|
|
select CRYPTO_AES
|
2015-12-17 17:13:07 +00:00
|
|
|
select CRYPTO_AEAD
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2019-11-13 09:55:50 +00:00
|
|
|
select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
|
|
|
|
select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
|
2012-07-01 17:19:44 +00:00
|
|
|
help
|
|
|
|
Some Atmel processors have AES hw accelerator.
|
|
|
|
Select this if you want to use the Atmel module for
|
|
|
|
AES algorithms.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-aes.
|
|
|
|
|
2012-07-01 17:19:45 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_TDES
|
|
|
|
tristate "Support for Atmel DES/TDES hw accelerator"
|
2017-02-06 12:32:15 +00:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2012-07-01 17:19:45 +00:00
|
|
|
help
|
|
|
|
Some Atmel processors have DES/TDES hw accelerator.
|
|
|
|
Select this if you want to use the Atmel module for
|
|
|
|
DES/TDES algorithms.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-tdes.
|
|
|
|
|
2012-07-01 17:19:46 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_SHA
|
2013-02-20 16:10:26 +00:00
|
|
|
tristate "Support for Atmel SHA hw accelerator"
|
2017-02-06 12:32:15 +00:00
|
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
2015-06-17 06:58:24 +00:00
|
|
|
select CRYPTO_HASH
|
2012-07-01 17:19:46 +00:00
|
|
|
help
|
2013-02-20 16:10:26 +00:00
|
|
|
Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
|
|
|
|
hw accelerator.
|
2012-07-01 17:19:46 +00:00
|
|
|
Select this if you want to use the Atmel module for
|
2013-02-20 16:10:26 +00:00
|
|
|
SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
|
2012-07-01 17:19:46 +00:00
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-sha.
|
|
|
|
|
2019-05-24 16:26:48 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_I2C
|
|
|
|
tristate
|
2020-12-03 23:20:04 +00:00
|
|
|
select BITREVERSE
|
2019-05-24 16:26:48 +00:00
|
|
|
|
2017-07-05 10:07:59 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_ECC
|
|
|
|
tristate "Support for Microchip / Atmel ECC hw accelerator"
|
|
|
|
depends on I2C
|
2019-05-24 16:26:48 +00:00
|
|
|
select CRYPTO_DEV_ATMEL_I2C
|
2017-07-05 10:07:59 +00:00
|
|
|
select CRYPTO_ECDH
|
|
|
|
select CRC16
|
|
|
|
help
|
|
|
|
Microhip / Atmel ECC hw accelerator.
|
|
|
|
Select this if you want to use the Microchip / Atmel module for
|
|
|
|
ECDH algorithm.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-ecc.
|
|
|
|
|
2019-05-24 16:26:49 +00:00
|
|
|
config CRYPTO_DEV_ATMEL_SHA204A
|
|
|
|
tristate "Support for Microchip / Atmel SHA accelerator and RNG"
|
|
|
|
depends on I2C
|
|
|
|
select CRYPTO_DEV_ATMEL_I2C
|
|
|
|
select HW_RANDOM
|
2019-05-31 12:17:49 +00:00
|
|
|
select CRC16
|
2019-05-24 16:26:49 +00:00
|
|
|
help
|
|
|
|
Microhip / Atmel SHA accelerator and RNG.
|
|
|
|
Select this if you want to use the Microchip / Atmel SHA204A
|
|
|
|
module as a random number generator. (Other functions of the
|
|
|
|
chip are currently not exposed by this driver)
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called atmel-sha204a.
|
|
|
|
|
2013-11-12 17:46:51 +00:00
|
|
|
config CRYPTO_DEV_CCP
|
2017-07-06 14:59:14 +00:00
|
|
|
bool "Support for AMD Secure Processor"
|
2015-02-03 19:07:29 +00:00
|
|
|
depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
|
2013-11-12 17:46:51 +00:00
|
|
|
help
|
2017-07-06 14:59:14 +00:00
|
|
|
The AMD Secure Processor provides support for the Cryptographic Coprocessor
|
|
|
|
(CCP) and the Platform Security Processor (PSP) devices.
|
2013-11-12 17:46:51 +00:00
|
|
|
|
|
|
|
if CRYPTO_DEV_CCP
|
|
|
|
source "drivers/crypto/ccp/Kconfig"
|
|
|
|
endif
|
|
|
|
|
2013-12-10 19:26:21 +00:00
|
|
|
config CRYPTO_DEV_MXS_DCP
|
|
|
|
tristate "Support for Freescale MXS DCP"
|
2015-09-02 15:05:18 +00:00
|
|
|
depends on (ARCH_MXS || ARCH_MXC)
|
2015-10-12 13:52:34 +00:00
|
|
|
select STMP_DEVICE
|
2013-12-10 19:26:21 +00:00
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_AES
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2015-06-17 06:58:24 +00:00
|
|
|
select CRYPTO_HASH
|
2013-12-10 19:26:21 +00:00
|
|
|
help
|
|
|
|
The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
|
|
|
|
co-processor on the die.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
will be called mxs-dcp.
|
|
|
|
|
2017-02-07 14:51:15 +00:00
|
|
|
source "drivers/crypto/cavium/cpt/Kconfig"
|
2017-05-30 11:58:01 +00:00
|
|
|
source "drivers/crypto/cavium/nitrox/Kconfig"
|
2020-03-13 11:47:05 +00:00
|
|
|
source "drivers/crypto/marvell/Kconfig"
|
2023-03-28 15:39:49 +00:00
|
|
|
source "drivers/crypto/intel/Kconfig"
|
2014-06-25 16:28:58 +00:00
|
|
|
|
2017-02-15 05:15:08 +00:00
|
|
|
config CRYPTO_DEV_CAVIUM_ZIP
|
|
|
|
tristate "Cavium ZIP driver"
|
|
|
|
depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
|
2020-06-13 16:50:22 +00:00
|
|
|
help
|
2017-02-15 05:15:08 +00:00
|
|
|
Select this option if you want to enable compression/decompression
|
|
|
|
acceleration on Cavium's ARM based SoCs
|
|
|
|
|
2014-06-25 16:28:58 +00:00
|
|
|
config CRYPTO_DEV_QCE
|
|
|
|
tristate "Qualcomm crypto engine accelerator"
|
2018-04-17 17:49:03 +00:00
|
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
|
|
depends on HAS_IOMEM
|
2019-12-20 19:02:18 +00:00
|
|
|
help
|
|
|
|
This driver supports Qualcomm crypto engine accelerator
|
|
|
|
hardware. To compile this driver as a module, choose M here. The
|
|
|
|
module will be called qcrypto.
|
|
|
|
|
|
|
|
config CRYPTO_DEV_QCE_SKCIPHER
|
|
|
|
bool
|
|
|
|
depends on CRYPTO_DEV_QCE
|
2014-06-25 16:28:58 +00:00
|
|
|
select CRYPTO_AES
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2014-06-25 16:28:58 +00:00
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_XTS
|
|
|
|
select CRYPTO_CTR
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2019-12-20 19:02:18 +00:00
|
|
|
|
|
|
|
config CRYPTO_DEV_QCE_SHA
|
|
|
|
bool
|
|
|
|
depends on CRYPTO_DEV_QCE
|
2020-06-22 06:15:04 +00:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
2019-12-20 19:02:18 +00:00
|
|
|
|
2021-04-29 15:07:04 +00:00
|
|
|
config CRYPTO_DEV_QCE_AEAD
|
|
|
|
bool
|
|
|
|
depends on CRYPTO_DEV_QCE
|
|
|
|
select CRYPTO_AUTHENC
|
|
|
|
select CRYPTO_LIB_DES
|
|
|
|
|
2019-12-20 19:02:18 +00:00
|
|
|
choice
|
|
|
|
prompt "Algorithms enabled for QCE acceleration"
|
|
|
|
default CRYPTO_DEV_QCE_ENABLE_ALL
|
|
|
|
depends on CRYPTO_DEV_QCE
|
|
|
|
help
|
2020-11-14 12:12:27 +00:00
|
|
|
This option allows to choose whether to build support for all algorithms
|
2019-12-20 19:02:18 +00:00
|
|
|
(default), hashes-only, or skciphers-only.
|
|
|
|
|
|
|
|
The QCE engine does not appear to scale as well as the CPU to handle
|
|
|
|
multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
|
|
|
|
QCE handles only 2 requests in parallel.
|
|
|
|
|
|
|
|
Ipsec throughput seems to improve when disabling either family of
|
|
|
|
algorithms, sharing the load with the CPU. Enabling skciphers-only
|
|
|
|
appears to work best.
|
|
|
|
|
|
|
|
config CRYPTO_DEV_QCE_ENABLE_ALL
|
|
|
|
bool "All supported algorithms"
|
|
|
|
select CRYPTO_DEV_QCE_SKCIPHER
|
|
|
|
select CRYPTO_DEV_QCE_SHA
|
2021-04-29 15:07:04 +00:00
|
|
|
select CRYPTO_DEV_QCE_AEAD
|
2019-12-20 19:02:18 +00:00
|
|
|
help
|
|
|
|
Enable all supported algorithms:
|
|
|
|
- AES (CBC, CTR, ECB, XTS)
|
|
|
|
- 3DES (CBC, ECB)
|
|
|
|
- DES (CBC, ECB)
|
|
|
|
- SHA1, HMAC-SHA1
|
|
|
|
- SHA256, HMAC-SHA256
|
|
|
|
|
|
|
|
config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
|
|
|
|
bool "Symmetric-key ciphers only"
|
|
|
|
select CRYPTO_DEV_QCE_SKCIPHER
|
|
|
|
help
|
|
|
|
Enable symmetric-key ciphers only:
|
|
|
|
- AES (CBC, CTR, ECB, XTS)
|
|
|
|
- 3DES (ECB, CBC)
|
|
|
|
- DES (ECB, CBC)
|
|
|
|
|
|
|
|
config CRYPTO_DEV_QCE_ENABLE_SHA
|
|
|
|
bool "Hash/HMAC only"
|
|
|
|
select CRYPTO_DEV_QCE_SHA
|
|
|
|
help
|
|
|
|
Enable hashes/HMAC algorithms only:
|
|
|
|
- SHA1, HMAC-SHA1
|
|
|
|
- SHA256, HMAC-SHA256
|
|
|
|
|
2021-04-29 15:07:04 +00:00
|
|
|
config CRYPTO_DEV_QCE_ENABLE_AEAD
|
|
|
|
bool "AEAD algorithms only"
|
|
|
|
select CRYPTO_DEV_QCE_AEAD
|
|
|
|
help
|
|
|
|
Enable AEAD algorithms only:
|
|
|
|
- authenc()
|
|
|
|
- ccm(aes)
|
|
|
|
- rfc4309(ccm(aes))
|
2019-12-20 19:02:18 +00:00
|
|
|
endchoice
|
2014-06-25 16:28:58 +00:00
|
|
|
|
crypto: qce - use AES fallback for small requests
Process small blocks using the fallback cipher, as a workaround for an
observed failure (DMA-related, apparently) when computing the GCM ghash
key. This brings a speed gain as well, since it avoids the latency of
using the hardware engine to process small blocks.
Using software for all 16-byte requests would be enough to make GCM
work, but to increase performance, a larger threshold would be better.
Measuring the performance of supported ciphers with openssl speed,
software matches hardware at around 768-1024 bytes.
Considering the 256-bit ciphers, software is 2-3 times faster than qce
at 256-bytes, 30% faster at 512, and about even at 768-bytes. With
128-bit keys, the break-even point would be around 1024-bytes.
This adds the 'aes_sw_max_len' parameter, to set the largest request
length processed by the software fallback. Its default is being set to
512 bytes, a little lower than the break-even point, to balance the cost
in CPU usage.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-07 15:02:26 +00:00
|
|
|
config CRYPTO_DEV_QCE_SW_MAX_LEN
|
|
|
|
int "Default maximum request size to use software for AES"
|
|
|
|
depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
|
|
|
|
default 512
|
|
|
|
help
|
|
|
|
This sets the default maximum request size to perform AES requests
|
|
|
|
using software instead of the crypto engine. It can be changed by
|
|
|
|
setting the aes_sw_max_len parameter.
|
|
|
|
|
|
|
|
Small blocks are processed faster in software than hardware.
|
|
|
|
Considering the 256-bit ciphers, software is 2-3 times faster than
|
|
|
|
qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
|
|
|
|
With 128-bit keys, the break-even point would be around 1024-bytes.
|
|
|
|
|
|
|
|
The default is set a little lower, to 512 bytes, to balance the
|
|
|
|
cost in CPU usage. The minimum recommended setting is 16-bytes
|
|
|
|
(1 AES block), since AES-GCM will fail if you set it lower.
|
|
|
|
Setting this to zero will send all requests to the hardware.
|
|
|
|
|
|
|
|
Note that 192-bit keys are not supported by the hardware and are
|
|
|
|
always processed by the software fallback, and all DES requests
|
|
|
|
are done by the hardware.
|
|
|
|
|
2018-07-16 05:50:24 +00:00
|
|
|
config CRYPTO_DEV_QCOM_RNG
|
|
|
|
tristate "Qualcomm Random Number Generator Driver"
|
|
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
2023-10-16 17:45:53 +00:00
|
|
|
depends on HW_RANDOM
|
2018-07-16 05:50:24 +00:00
|
|
|
select CRYPTO_RNG
|
|
|
|
help
|
|
|
|
This driver provides support for the Random Number
|
|
|
|
Generator hardware found on Qualcomm SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here. The
|
2019-11-21 03:20:48 +00:00
|
|
|
module will be called qcom-rng. If unsure, say N.
|
2018-07-16 05:50:24 +00:00
|
|
|
|
2015-02-06 16:59:48 +00:00
|
|
|
config CRYPTO_DEV_VMX
|
|
|
|
bool "Support for VMX cryptographic acceleration instructions"
|
2015-09-09 08:22:35 +00:00
|
|
|
depends on PPC64 && VSX
|
2015-02-06 16:59:48 +00:00
|
|
|
help
|
|
|
|
Support for VMX cryptographic acceleration instructions.
|
|
|
|
|
|
|
|
source "drivers/crypto/vmx/Kconfig"
|
|
|
|
|
2015-03-12 23:17:26 +00:00
|
|
|
config CRYPTO_DEV_IMGTEC_HASH
|
|
|
|
tristate "Imagination Technologies hardware hash accelerator"
|
2015-04-23 18:03:58 +00:00
|
|
|
depends on MIPS || COMPILE_TEST
|
2015-03-12 23:17:26 +00:00
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_HASH
|
|
|
|
help
|
|
|
|
This driver interfaces with the Imagination Technologies
|
|
|
|
hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
|
|
|
|
hashing algorithms.
|
|
|
|
|
2015-11-25 05:43:32 +00:00
|
|
|
config CRYPTO_DEV_ROCKCHIP
|
|
|
|
tristate "Rockchip's Cryptographic Engine driver"
|
|
|
|
depends on OF && ARCH_ROCKCHIP
|
2022-09-27 07:54:44 +00:00
|
|
|
depends on PM
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_DES
|
2015-11-25 05:43:32 +00:00
|
|
|
select CRYPTO_AES
|
2022-09-27 07:54:48 +00:00
|
|
|
select CRYPTO_ENGINE
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2016-02-16 02:15:01 +00:00
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_HASH
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2015-11-25 05:43:32 +00:00
|
|
|
|
|
|
|
help
|
|
|
|
This driver interfaces with the hardware crypto accelerator.
|
|
|
|
Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
|
|
|
|
|
2022-09-27 07:54:50 +00:00
|
|
|
config CRYPTO_DEV_ROCKCHIP_DEBUG
|
|
|
|
bool "Enable Rockchip crypto stats"
|
|
|
|
depends on CRYPTO_DEV_ROCKCHIP
|
|
|
|
depends on DEBUG_FS
|
|
|
|
help
|
|
|
|
Say y to enable Rockchip crypto debug stats.
|
|
|
|
This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
|
|
|
|
the number of requests per algorithm and other internal stats.
|
|
|
|
|
|
|
|
|
2020-02-17 10:26:43 +00:00
|
|
|
config CRYPTO_DEV_ZYNQMP_AES
|
|
|
|
tristate "Support for Xilinx ZynqMP AES hw accelerator"
|
|
|
|
depends on ZYNQMP_FIRMWARE || COMPILE_TEST
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ENGINE
|
|
|
|
select CRYPTO_AEAD
|
|
|
|
help
|
|
|
|
Xilinx ZynqMP has AES-GCM engine used for symmetric key
|
|
|
|
encryption and decryption. This driver interfaces with AES hw
|
|
|
|
accelerator. Select this if you want to use the ZynqMP module
|
|
|
|
for AES algorithms.
|
|
|
|
|
2022-02-23 10:35:03 +00:00
|
|
|
config CRYPTO_DEV_ZYNQMP_SHA3
|
2022-03-09 03:20:01 +00:00
|
|
|
tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
|
|
|
|
depends on ZYNQMP_FIRMWARE || COMPILE_TEST
|
2022-02-23 10:35:03 +00:00
|
|
|
select CRYPTO_SHA3
|
|
|
|
help
|
|
|
|
Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
|
|
|
|
This driver interfaces with SHA3 hardware engine.
|
|
|
|
Select this if you want to use the ZynqMP module
|
|
|
|
for SHA3 hash computation.
|
|
|
|
|
2016-08-17 07:03:06 +00:00
|
|
|
source "drivers/crypto/chelsio/Kconfig"
|
|
|
|
|
2016-12-15 02:03:16 +00:00
|
|
|
source "drivers/crypto/virtio/Kconfig"
|
|
|
|
|
2017-02-03 17:55:33 +00:00
|
|
|
config CRYPTO_DEV_BCM_SPU
|
|
|
|
tristate "Broadcom symmetric crypto/hash acceleration support"
|
|
|
|
depends on ARCH_BCM_IPROC
|
2017-07-11 10:20:06 +00:00
|
|
|
depends on MAILBOX
|
2017-02-03 17:55:33 +00:00
|
|
|
default m
|
2018-12-17 07:23:23 +00:00
|
|
|
select CRYPTO_AUTHENC
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2017-02-03 17:55:33 +00:00
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
help
|
|
|
|
This driver provides support for Broadcom crypto acceleration using the
|
2019-11-09 17:09:35 +00:00
|
|
|
Secure Processing Unit (SPU). The SPU driver registers skcipher,
|
2017-02-03 17:55:33 +00:00
|
|
|
ahash, and aead algorithms with the kernel cryptographic API.
|
|
|
|
|
2017-03-21 15:13:28 +00:00
|
|
|
source "drivers/crypto/stm32/Kconfig"
|
|
|
|
|
2017-05-24 14:10:34 +00:00
|
|
|
config CRYPTO_DEV_SAFEXCEL
|
|
|
|
tristate "Inside Secure's SafeXcel cryptographic engine driver"
|
2019-12-11 19:27:39 +00:00
|
|
|
depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
|
2019-07-02 19:41:27 +00:00
|
|
|
select CRYPTO_LIB_AES
|
2018-05-14 13:11:02 +00:00
|
|
|
select CRYPTO_AUTHENC
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2017-05-24 14:10:34 +00:00
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRYPTO_HMAC
|
2018-06-28 15:21:53 +00:00
|
|
|
select CRYPTO_MD5
|
2017-05-24 14:10:34 +00:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
2019-09-18 21:25:58 +00:00
|
|
|
select CRYPTO_CHACHA20POLY1305
|
2019-09-13 18:56:49 +00:00
|
|
|
select CRYPTO_SHA3
|
2017-05-24 14:10:34 +00:00
|
|
|
help
|
2019-08-19 14:40:23 +00:00
|
|
|
This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
|
|
|
|
engines designed by Inside Secure. It currently accelerates DES, 3DES and
|
|
|
|
AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
|
|
|
|
SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
|
|
|
|
Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
|
2017-05-24 14:10:34 +00:00
|
|
|
|
2017-08-10 12:53:53 +00:00
|
|
|
config CRYPTO_DEV_ARTPEC6
|
|
|
|
tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
|
|
|
|
depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
|
|
|
|
depends on OF
|
|
|
|
select CRYPTO_AEAD
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ALGAPI
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2017-08-10 12:53:53 +00:00
|
|
|
select CRYPTO_CTR
|
|
|
|
select CRYPTO_HASH
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
help
|
|
|
|
Enables the driver for the on-chip crypto accelerator
|
|
|
|
of Axis ARTPEC SoCs.
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here.
|
|
|
|
|
2018-01-22 09:27:00 +00:00
|
|
|
config CRYPTO_DEV_CCREE
|
|
|
|
tristate "Support for ARM TrustZone CryptoCell family of security processors"
|
|
|
|
depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
|
2023-03-16 05:30:06 +00:00
|
|
|
depends on HAS_IOMEM
|
2018-01-22 09:27:00 +00:00
|
|
|
select CRYPTO_HASH
|
2019-10-25 19:41:13 +00:00
|
|
|
select CRYPTO_SKCIPHER
|
2019-08-15 09:01:09 +00:00
|
|
|
select CRYPTO_LIB_DES
|
2018-01-22 09:27:00 +00:00
|
|
|
select CRYPTO_AEAD
|
|
|
|
select CRYPTO_AUTHENC
|
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_MD5
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
|
|
|
select CRYPTO_HMAC
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_CBC
|
|
|
|
select CRYPTO_ECB
|
|
|
|
select CRYPTO_CTR
|
|
|
|
select CRYPTO_XTS
|
2022-11-25 12:18:11 +00:00
|
|
|
select CRYPTO_SM4_GENERIC
|
|
|
|
select CRYPTO_SM3_GENERIC
|
2018-01-22 09:27:00 +00:00
|
|
|
help
|
2018-02-19 14:51:23 +00:00
|
|
|
Say 'Y' to enable a driver for the REE interface of the Arm
|
|
|
|
TrustZone CryptoCell family of processors. Currently the
|
2018-11-13 09:40:35 +00:00
|
|
|
CryptoCell 713, 703, 712, 710 and 630 are supported.
|
2018-01-22 09:27:00 +00:00
|
|
|
Choose this if you wish to use hardware acceleration of
|
|
|
|
cryptographic operations on the system REE.
|
|
|
|
If unsure say Y.
|
|
|
|
|
2018-07-23 15:49:54 +00:00
|
|
|
source "drivers/crypto/hisilicon/Kconfig"
|
|
|
|
|
2019-10-17 05:06:25 +00:00
|
|
|
source "drivers/crypto/amlogic/Kconfig"
|
|
|
|
|
2020-07-13 08:34:22 +00:00
|
|
|
config CRYPTO_DEV_SA2UL
|
|
|
|
tristate "Support for TI security accelerator"
|
|
|
|
depends on ARCH_K3 || COMPILE_TEST
|
|
|
|
select CRYPTO_AES
|
|
|
|
select CRYPTO_ALGAPI
|
2020-09-07 06:22:40 +00:00
|
|
|
select CRYPTO_AUTHENC
|
2023-03-24 14:58:12 +00:00
|
|
|
select CRYPTO_DES
|
2020-08-06 15:54:48 +00:00
|
|
|
select CRYPTO_SHA1
|
|
|
|
select CRYPTO_SHA256
|
|
|
|
select CRYPTO_SHA512
|
2020-07-13 08:34:22 +00:00
|
|
|
select HW_RANDOM
|
|
|
|
select SG_SPLIT
|
|
|
|
help
|
|
|
|
K3 devices include a security accelerator engine that may be
|
|
|
|
used for crypto offload. Select this if you want to use hardware
|
|
|
|
acceleration for cryptographic algorithms on these devices.
|
|
|
|
|
2022-08-18 03:59:52 +00:00
|
|
|
source "drivers/crypto/aspeed/Kconfig"
|
2023-05-15 12:53:53 +00:00
|
|
|
source "drivers/crypto/starfive/Kconfig"
|
crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 11:51:48 +00:00
|
|
|
|
2007-07-16 06:39:36 +00:00
|
|
|
endif # CRYPTO_HW
|