2010-07-26 23:32:03 +00:00
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/*
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* LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
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*
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2016-12-19 22:07:08 +00:00
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* sir_ir - Device driver for use with SIR (serial infra red)
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2010-07-26 23:32:03 +00:00
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* mode of IrDA on many notebooks.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*
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* 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
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* added timeout and relaxed pulse detection, removed gap bug
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*
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* 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
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* added support for Tekram Irmate 210 (sending does not work yet,
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* kind of disappointing that nobody was able to implement that
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* before),
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* major clean-up
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*
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* 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
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* added support for StrongARM SA1100 embedded microprocessor
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* parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
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*/
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2012-11-08 18:53:37 +00:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2010-07-26 23:32:03 +00:00
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#include <linux/module.h>
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2017-02-02 18:15:33 +00:00
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#include <linux/sched/signal.h>
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2010-07-26 23:32:03 +00:00
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#include <linux/errno.h>
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#include <linux/signal.h>
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#include <linux/fs.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/serial_reg.h>
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2015-05-22 15:58:42 +00:00
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#include <linux/ktime.h>
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2010-07-26 23:32:03 +00:00
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/poll.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <linux/fcntl.h>
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2012-06-04 16:05:24 +00:00
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#include <linux/platform_device.h>
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2010-07-26 23:32:03 +00:00
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#include <linux/timer.h>
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2016-12-19 22:07:08 +00:00
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#include <media/rc-core.h>
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2010-07-26 23:32:03 +00:00
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/* SECTION: Definitions */
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/*** Tekram dongle ***/
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#ifdef LIRC_SIR_TEKRAM
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/* stolen from kernel source */
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/* definitions for Tekram dongle */
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#define TEKRAM_115200 0x00
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#define TEKRAM_57600 0x01
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#define TEKRAM_38400 0x02
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#define TEKRAM_19200 0x03
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#define TEKRAM_9600 0x04
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#define TEKRAM_2400 0x08
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#define TEKRAM_PW 0x10 /* Pulse select bit */
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/* 10bit * 1s/115200bit in milliseconds = 87ms*/
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#define TIME_CONST (10000000ul/115200ul)
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#endif
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#ifdef LIRC_SIR_ACTISYS_ACT200L
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static void init_act200(void);
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#elif defined(LIRC_SIR_ACTISYS_ACT220L)
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static void init_act220(void);
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#endif
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#define PULSE '['
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#ifndef LIRC_SIR_TEKRAM
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/* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
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#define TIME_CONST (9000000ul/115200ul)
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#endif
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/* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
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#define SIR_TIMEOUT (HZ*5/100)
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#ifndef LIRC_ON_SA1100
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#ifndef LIRC_IRQ
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#define LIRC_IRQ 4
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#endif
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#ifndef LIRC_PORT
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/* for external dongles, default to com1 */
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2011-04-30 20:03:20 +00:00
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#if defined(LIRC_SIR_ACTISYS_ACT200L) || \
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defined(LIRC_SIR_ACTISYS_ACT220L) || \
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defined(LIRC_SIR_TEKRAM)
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2010-07-26 23:32:03 +00:00
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#define LIRC_PORT 0x3f8
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#else
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/* onboard sir ports are typically com3 */
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#define LIRC_PORT 0x3e8
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#endif
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#endif
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static int io = LIRC_PORT;
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static int irq = LIRC_IRQ;
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static int threshold = 3;
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#endif
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static DEFINE_SPINLOCK(timer_lock);
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static struct timer_list timerlist;
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/* time of last signal change detected */
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2015-05-22 15:58:42 +00:00
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static ktime_t last;
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2010-07-26 23:32:03 +00:00
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/* time of last UART data ready interrupt */
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2015-05-22 15:58:42 +00:00
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static ktime_t last_intr_time;
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2010-07-26 23:32:03 +00:00
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static int last_value;
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2016-12-19 22:07:08 +00:00
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static struct rc_dev *rcdev;
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2010-07-26 23:32:03 +00:00
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2016-12-19 22:07:08 +00:00
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static struct platform_device *sir_ir_dev;
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2010-07-26 23:32:03 +00:00
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static DEFINE_SPINLOCK(hardware_lock);
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2012-01-12 23:02:20 +00:00
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static bool debug;
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2010-07-26 23:32:03 +00:00
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/* SECTION: Prototypes */
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/* Communication with user-space */
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static void add_read_queue(int flag, unsigned long val);
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static int init_chrdev(void);
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/* Hardware */
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static irqreturn_t sir_interrupt(int irq, void *dev_id);
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static void send_space(unsigned long len);
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static void send_pulse(unsigned long len);
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static int init_hardware(void);
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static void drop_hardware(void);
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/* Initialisation */
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static int init_port(void);
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static void drop_port(void);
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static inline unsigned int sinp(int offset)
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{
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return inb(io + offset);
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}
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static inline void soutp(int offset, int value)
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{
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outb(value, io + offset);
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}
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#ifndef MAX_UDELAY_MS
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#define MAX_UDELAY_US 5000
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#else
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#define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
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#endif
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static void safe_udelay(unsigned long usecs)
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{
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while (usecs > MAX_UDELAY_US) {
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udelay(MAX_UDELAY_US);
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usecs -= MAX_UDELAY_US;
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}
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udelay(usecs);
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}
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/* SECTION: Communication with user-space */
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2016-12-19 22:07:08 +00:00
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static int sir_tx_ir(struct rc_dev *dev, unsigned int *tx_buf,
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unsigned int count)
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2010-07-26 23:32:03 +00:00
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{
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unsigned long flags;
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2016-12-19 22:07:08 +00:00
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int i;
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2010-07-26 23:32:03 +00:00
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local_irq_save(flags);
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2016-12-19 22:07:08 +00:00
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for (i = 0; i < count;) {
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2010-07-26 23:32:03 +00:00
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if (tx_buf[i])
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send_pulse(tx_buf[i]);
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i++;
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if (i >= count)
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break;
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if (tx_buf[i])
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send_space(tx_buf[i]);
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i++;
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}
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local_irq_restore(flags);
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2016-12-19 22:07:08 +00:00
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return count;
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2010-07-26 23:32:03 +00:00
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}
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static void add_read_queue(int flag, unsigned long val)
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{
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2016-12-19 22:07:08 +00:00
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DEFINE_IR_RAW_EVENT(ev);
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2010-07-26 23:32:03 +00:00
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2014-10-26 17:46:00 +00:00
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pr_debug("add flag %d with val %lu\n", flag, val);
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2010-07-26 23:32:03 +00:00
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/*
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* statistically, pulses are ~TIME_CONST/2 too long. we could
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* maybe make this more exact, but this is good enough
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*/
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if (flag) {
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/* pulse */
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2016-12-19 22:07:08 +00:00
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if (val > TIME_CONST / 2)
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val -= TIME_CONST / 2;
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2010-07-26 23:32:03 +00:00
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else /* should not ever happen */
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2016-12-19 22:07:08 +00:00
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val = 1;
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ev.pulse = true;
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2010-07-26 23:32:03 +00:00
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} else {
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2016-12-19 22:07:08 +00:00
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val += TIME_CONST / 2;
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2010-07-26 23:32:03 +00:00
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}
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2016-12-19 22:07:08 +00:00
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ev.duration = US_TO_NS(val);
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2010-07-26 23:32:03 +00:00
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2016-12-19 22:07:08 +00:00
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ir_raw_event_store_with_filter(rcdev, &ev);
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2010-07-26 23:32:03 +00:00
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}
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static int init_chrdev(void)
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{
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2016-12-19 22:07:08 +00:00
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rcdev = devm_rc_allocate_device(&sir_ir_dev->dev, RC_DRIVER_IR_RAW);
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if (!rcdev)
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return -ENOMEM;
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2017-03-25 10:31:57 +00:00
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rcdev->input_name = "SIR IrDA port";
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2016-12-19 22:07:08 +00:00
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rcdev->input_phys = KBUILD_MODNAME "/input0";
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rcdev->input_id.bustype = BUS_HOST;
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rcdev->input_id.vendor = 0x0001;
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rcdev->input_id.product = 0x0001;
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rcdev->input_id.version = 0x0100;
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rcdev->tx_ir = sir_tx_ir;
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rcdev->allowed_protocols = RC_BIT_ALL_IR_DECODER;
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2017-03-25 10:31:57 +00:00
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rcdev->driver_name = KBUILD_MODNAME;
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2016-12-19 22:07:08 +00:00
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rcdev->map_name = RC_MAP_RC6_MCE;
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rcdev->timeout = IR_DEFAULT_TIMEOUT;
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rcdev->dev.parent = &sir_ir_dev->dev;
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return devm_rc_register_device(&sir_ir_dev->dev, rcdev);
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2010-07-26 23:32:03 +00:00
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}
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/* SECTION: Hardware */
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static void sir_timeout(unsigned long data)
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{
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/*
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* if last received signal was a pulse, but receiving stopped
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* within the 9 bit frame, we need to finish this pulse and
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* simulate a signal change to from pulse to space. Otherwise
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* upper layers will receive two sequences next time.
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*/
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unsigned long flags;
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unsigned long pulse_end;
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/* avoid interference with interrupt */
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spin_lock_irqsave(&timer_lock, flags);
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if (last_value) {
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/* clear unread bits in UART and restart */
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outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
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/* determine 'virtual' pulse end: */
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2015-05-22 15:58:42 +00:00
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pulse_end = min_t(unsigned long,
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ktime_us_delta(last, last_intr_time),
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2016-12-19 22:07:08 +00:00
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IR_MAX_DURATION);
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dev_dbg(&sir_ir_dev->dev, "timeout add %d for %lu usec\n",
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last_value, pulse_end);
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2010-07-26 23:32:03 +00:00
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add_read_queue(last_value, pulse_end);
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last_value = 0;
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2015-05-22 15:58:42 +00:00
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last = last_intr_time;
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2010-07-26 23:32:03 +00:00
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}
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spin_unlock_irqrestore(&timer_lock, flags);
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2016-12-19 22:07:08 +00:00
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ir_raw_event_handle(rcdev);
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2010-07-26 23:32:03 +00:00
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}
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static irqreturn_t sir_interrupt(int irq, void *dev_id)
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{
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unsigned char data;
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2015-05-22 15:58:42 +00:00
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ktime_t curr_time;
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static unsigned long delt;
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unsigned long deltintr;
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2010-07-26 23:32:03 +00:00
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unsigned long flags;
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int iir, lsr;
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while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
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switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
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case UART_IIR_MSI:
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(void) inb(io + UART_MSR);
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break;
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case UART_IIR_RLSI:
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(void) inb(io + UART_LSR);
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break;
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case UART_IIR_THRI:
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#if 0
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if (lsr & UART_LSR_THRE) /* FIFO is empty */
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outb(data, io + UART_TX)
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#endif
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break;
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case UART_IIR_RDI:
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/* avoid interference with timer */
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spin_lock_irqsave(&timer_lock, flags);
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do {
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del_timer(&timerlist);
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data = inb(io + UART_RX);
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2015-05-22 15:58:42 +00:00
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curr_time = ktime_get();
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delt = min_t(unsigned long,
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ktime_us_delta(last, curr_time),
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2016-12-19 22:07:08 +00:00
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IR_MAX_DURATION);
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2015-05-22 15:58:42 +00:00
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deltintr = min_t(unsigned long,
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ktime_us_delta(last_intr_time,
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curr_time),
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2016-12-19 22:07:08 +00:00
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IR_MAX_DURATION);
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dev_dbg(&sir_ir_dev->dev, "t %lu, d %d\n",
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deltintr, (int)data);
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2010-07-26 23:32:03 +00:00
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/*
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* if nothing came in last X cycles,
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* it was gap
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*/
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2015-05-22 15:58:42 +00:00
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if (deltintr > TIME_CONST * threshold) {
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2010-07-26 23:32:03 +00:00
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if (last_value) {
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2016-12-19 22:07:08 +00:00
|
|
|
dev_dbg(&sir_ir_dev->dev, "GAP\n");
|
2010-07-26 23:32:03 +00:00
|
|
|
/* simulate signal change */
|
|
|
|
add_read_queue(last_value,
|
2015-05-22 15:58:42 +00:00
|
|
|
delt -
|
|
|
|
deltintr);
|
2010-07-26 23:32:03 +00:00
|
|
|
last_value = 0;
|
2015-05-22 15:58:42 +00:00
|
|
|
last = last_intr_time;
|
|
|
|
delt = deltintr;
|
2010-07-26 23:32:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
data = 1;
|
|
|
|
if (data ^ last_value) {
|
|
|
|
/*
|
2015-05-22 15:58:42 +00:00
|
|
|
* deltintr > 2*TIME_CONST, remember?
|
2010-07-26 23:32:03 +00:00
|
|
|
* the other case is timeout
|
|
|
|
*/
|
|
|
|
add_read_queue(last_value,
|
2015-05-22 15:58:42 +00:00
|
|
|
delt-TIME_CONST);
|
2010-07-26 23:32:03 +00:00
|
|
|
last_value = data;
|
2015-05-22 15:58:42 +00:00
|
|
|
last = curr_time;
|
|
|
|
last = ktime_sub_us(last,
|
|
|
|
TIME_CONST);
|
2010-07-26 23:32:03 +00:00
|
|
|
}
|
2015-05-22 15:58:42 +00:00
|
|
|
last_intr_time = curr_time;
|
2010-07-26 23:32:03 +00:00
|
|
|
if (data) {
|
|
|
|
/*
|
|
|
|
* start timer for end of
|
|
|
|
* sequence detection
|
|
|
|
*/
|
|
|
|
timerlist.expires = jiffies +
|
|
|
|
SIR_TIMEOUT;
|
|
|
|
add_timer(&timerlist);
|
|
|
|
}
|
|
|
|
|
|
|
|
lsr = inb(io + UART_LSR);
|
|
|
|
} while (lsr & UART_LSR_DR); /* data ready */
|
|
|
|
spin_unlock_irqrestore(&timer_lock, flags);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2016-12-19 22:07:08 +00:00
|
|
|
ir_raw_event_handle(rcdev);
|
2010-07-26 23:32:03 +00:00
|
|
|
return IRQ_RETVAL(IRQ_HANDLED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void send_space(unsigned long len)
|
|
|
|
{
|
|
|
|
safe_udelay(len);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void send_pulse(unsigned long len)
|
|
|
|
{
|
|
|
|
long bytes_out = len / TIME_CONST;
|
|
|
|
|
2011-05-27 18:46:19 +00:00
|
|
|
if (bytes_out == 0)
|
2010-07-26 23:32:03 +00:00
|
|
|
bytes_out++;
|
2011-05-27 18:46:19 +00:00
|
|
|
|
2010-07-26 23:32:03 +00:00
|
|
|
while (bytes_out--) {
|
|
|
|
outb(PULSE, io + UART_TX);
|
|
|
|
/* FIXME treba seriozne cakanie z char/serial.c */
|
|
|
|
while (!(inb(io + UART_LSR) & UART_LSR_THRE))
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int init_hardware(void)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&hardware_lock, flags);
|
|
|
|
/* reset UART */
|
2014-06-05 20:48:11 +00:00
|
|
|
#if defined(LIRC_SIR_TEKRAM)
|
2010-07-26 23:32:03 +00:00
|
|
|
/* disable FIFO */
|
|
|
|
soutp(UART_FCR,
|
|
|
|
UART_FCR_CLEAR_RCVR|
|
|
|
|
UART_FCR_CLEAR_XMIT|
|
|
|
|
UART_FCR_TRIGGER_1);
|
|
|
|
|
|
|
|
/* Set DLAB 0. */
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
|
|
|
|
|
|
|
|
/* First of all, disable all interrupts */
|
|
|
|
soutp(UART_IER, sinp(UART_IER) &
|
|
|
|
(~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
|
|
|
|
|
|
|
|
/* Set DLAB 1. */
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
|
|
|
|
|
|
|
|
/* Set divisor to 12 => 9600 Baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 12);
|
|
|
|
|
|
|
|
/* Set DLAB 0. */
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
|
|
|
|
|
|
|
|
/* power supply */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
safe_udelay(50*1000);
|
|
|
|
|
|
|
|
/* -DTR low -> reset PIC */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
|
|
|
|
udelay(1*1000);
|
|
|
|
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(100);
|
|
|
|
|
|
|
|
|
|
|
|
/* -RTS low -> send control byte */
|
|
|
|
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(7);
|
|
|
|
soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
|
|
|
|
|
|
|
|
/* one byte takes ~1042 usec to transmit at 9600,8N1 */
|
|
|
|
udelay(1500);
|
|
|
|
|
|
|
|
/* back to normal operation */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(50);
|
|
|
|
|
|
|
|
udelay(1500);
|
|
|
|
|
|
|
|
/* read previous control byte */
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_info("0x%02x\n", sinp(UART_RX));
|
2010-07-26 23:32:03 +00:00
|
|
|
|
|
|
|
/* Set DLAB 1. */
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
|
|
|
|
|
|
|
|
/* Set divisor to 1 => 115200 Baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 1);
|
|
|
|
|
|
|
|
/* Set DLAB 0, 8 Bit */
|
|
|
|
soutp(UART_LCR, UART_LCR_WLEN8);
|
|
|
|
/* enable interrupts */
|
|
|
|
soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
|
|
|
|
#else
|
|
|
|
outb(0, io + UART_MCR);
|
|
|
|
outb(0, io + UART_IER);
|
|
|
|
/* init UART */
|
|
|
|
/* set DLAB, speed = 115200 */
|
|
|
|
outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
|
|
|
|
outb(1, io + UART_DLL); outb(0, io + UART_DLM);
|
|
|
|
/* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
|
|
|
|
outb(UART_LCR_WLEN7, io + UART_LCR);
|
|
|
|
/* FIFO operation */
|
|
|
|
outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
|
|
|
|
/* interrupts */
|
|
|
|
/* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
|
|
|
|
outb(UART_IER_RDI, io + UART_IER);
|
|
|
|
/* turn on UART */
|
|
|
|
outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
|
|
|
|
#ifdef LIRC_SIR_ACTISYS_ACT200L
|
|
|
|
init_act200();
|
|
|
|
#elif defined(LIRC_SIR_ACTISYS_ACT220L)
|
|
|
|
init_act220();
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
spin_unlock_irqrestore(&hardware_lock, flags);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void drop_hardware(void)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&hardware_lock, flags);
|
|
|
|
|
|
|
|
/* turn off interrupts */
|
|
|
|
outb(0, io + UART_IER);
|
2014-06-05 20:48:11 +00:00
|
|
|
|
2010-07-26 23:32:03 +00:00
|
|
|
spin_unlock_irqrestore(&hardware_lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SECTION: Initialisation */
|
|
|
|
|
|
|
|
static int init_port(void)
|
|
|
|
{
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
/* get I/O port access and IRQ line */
|
2016-12-19 22:07:08 +00:00
|
|
|
if (!request_region(io, 8, KBUILD_MODNAME)) {
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_err("i/o port 0x%.4x already in use.\n", io);
|
2010-07-26 23:32:03 +00:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
2011-09-07 08:10:22 +00:00
|
|
|
retval = request_irq(irq, sir_interrupt, 0,
|
2016-12-19 22:07:08 +00:00
|
|
|
KBUILD_MODNAME, NULL);
|
2010-07-26 23:32:03 +00:00
|
|
|
if (retval < 0) {
|
|
|
|
release_region(io, 8);
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_err("IRQ %d already in use.\n", irq);
|
2010-07-26 23:32:03 +00:00
|
|
|
return retval;
|
|
|
|
}
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
|
2010-07-26 23:32:03 +00:00
|
|
|
|
2015-02-18 16:52:38 +00:00
|
|
|
setup_timer(&timerlist, sir_timeout, 0);
|
2010-07-26 23:32:03 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void drop_port(void)
|
|
|
|
{
|
|
|
|
free_irq(irq, NULL);
|
|
|
|
del_timer_sync(&timerlist);
|
|
|
|
release_region(io, 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef LIRC_SIR_ACTISYS_ACT200L
|
|
|
|
/* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
|
|
|
|
/* some code borrowed from Linux IRDA driver */
|
|
|
|
|
|
|
|
/* Register 0: Control register #1 */
|
|
|
|
#define ACT200L_REG0 0x00
|
|
|
|
#define ACT200L_TXEN 0x01 /* Enable transmitter */
|
|
|
|
#define ACT200L_RXEN 0x02 /* Enable receiver */
|
|
|
|
#define ACT200L_ECHO 0x08 /* Echo control chars */
|
|
|
|
|
|
|
|
/* Register 1: Control register #2 */
|
|
|
|
#define ACT200L_REG1 0x10
|
|
|
|
#define ACT200L_LODB 0x01 /* Load new baud rate count value */
|
|
|
|
#define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
|
|
|
|
|
|
|
|
/* Register 3: Transmit mode register #2 */
|
|
|
|
#define ACT200L_REG3 0x30
|
|
|
|
#define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
|
|
|
|
#define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
|
|
|
|
#define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
|
|
|
|
|
|
|
|
/* Register 4: Output Power register */
|
|
|
|
#define ACT200L_REG4 0x40
|
|
|
|
#define ACT200L_OP0 0x01 /* Enable LED1C output */
|
|
|
|
#define ACT200L_OP1 0x02 /* Enable LED2C output */
|
|
|
|
#define ACT200L_BLKR 0x04
|
|
|
|
|
|
|
|
/* Register 5: Receive Mode register */
|
|
|
|
#define ACT200L_REG5 0x50
|
|
|
|
#define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
|
|
|
|
/*.. other various IRDA bit modes, and TV remote modes..*/
|
|
|
|
|
|
|
|
/* Register 6: Receive Sensitivity register #1 */
|
|
|
|
#define ACT200L_REG6 0x60
|
|
|
|
#define ACT200L_RS0 0x01 /* receive threshold bit 0 */
|
|
|
|
#define ACT200L_RS1 0x02 /* receive threshold bit 1 */
|
|
|
|
|
|
|
|
/* Register 7: Receive Sensitivity register #2 */
|
|
|
|
#define ACT200L_REG7 0x70
|
|
|
|
#define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
|
|
|
|
|
|
|
|
/* Register 8,9: Baud Rate Divider register #1,#2 */
|
|
|
|
#define ACT200L_REG8 0x80
|
|
|
|
#define ACT200L_REG9 0x90
|
|
|
|
|
|
|
|
#define ACT200L_2400 0x5f
|
|
|
|
#define ACT200L_9600 0x17
|
|
|
|
#define ACT200L_19200 0x0b
|
|
|
|
#define ACT200L_38400 0x05
|
|
|
|
#define ACT200L_57600 0x03
|
|
|
|
#define ACT200L_115200 0x01
|
|
|
|
|
|
|
|
/* Register 13: Control register #3 */
|
|
|
|
#define ACT200L_REG13 0xd0
|
|
|
|
#define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
|
|
|
|
|
|
|
|
/* Register 15: Status register */
|
|
|
|
#define ACT200L_REG15 0xf0
|
|
|
|
|
|
|
|
/* Register 21: Control register #4 */
|
|
|
|
#define ACT200L_REG21 0x50
|
|
|
|
#define ACT200L_EXCK 0x02 /* Disable clock output driver */
|
|
|
|
#define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
|
|
|
|
|
|
|
|
static void init_act200(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
__u8 control[] = {
|
|
|
|
ACT200L_REG15,
|
|
|
|
ACT200L_REG13 | ACT200L_SHDW,
|
|
|
|
ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
|
|
|
|
ACT200L_REG13,
|
|
|
|
ACT200L_REG7 | ACT200L_ENPOS,
|
|
|
|
ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1,
|
|
|
|
ACT200L_REG5 | ACT200L_RWIDL,
|
|
|
|
ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR,
|
|
|
|
ACT200L_REG3 | ACT200L_B0,
|
|
|
|
ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN,
|
|
|
|
ACT200L_REG8 | (ACT200L_115200 & 0x0f),
|
|
|
|
ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
|
|
|
|
ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Set DLAB 1. */
|
|
|
|
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
|
|
|
|
|
|
|
|
/* Set divisor to 12 => 9600 Baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 12);
|
|
|
|
|
|
|
|
/* Set DLAB 0. */
|
|
|
|
soutp(UART_LCR, UART_LCR_WLEN8);
|
|
|
|
/* Set divisor to 12 => 9600 Baud */
|
|
|
|
|
|
|
|
/* power supply */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
for (i = 0; i < 50; i++)
|
|
|
|
safe_udelay(1000);
|
|
|
|
|
|
|
|
/* Reset the dongle : set RTS low for 25 ms */
|
|
|
|
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
for (i = 0; i < 25; i++)
|
|
|
|
udelay(1000);
|
|
|
|
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(100);
|
|
|
|
|
|
|
|
/* Clear DTR and set RTS to enter command mode */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
|
|
|
|
udelay(7);
|
|
|
|
|
|
|
|
/* send out the control register settings for 115K 7N1 SIR operation */
|
|
|
|
for (i = 0; i < sizeof(control); i++) {
|
|
|
|
soutp(UART_TX, control[i]);
|
|
|
|
/* one byte takes ~1042 usec to transmit at 9600,8N1 */
|
|
|
|
udelay(1500);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* back to normal operation */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(50);
|
|
|
|
|
|
|
|
udelay(1500);
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
|
|
|
|
|
|
|
|
/* Set DLAB 1. */
|
|
|
|
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* Set divisor to 1 => 115200 Baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 1);
|
|
|
|
|
|
|
|
/* Set DLAB 0. */
|
|
|
|
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
|
|
|
|
|
|
|
|
/* Set DLAB 0, 7 Bit */
|
|
|
|
soutp(UART_LCR, UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* enable interrupts */
|
|
|
|
soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef LIRC_SIR_ACTISYS_ACT220L
|
|
|
|
/*
|
|
|
|
* Derived from linux IrDA driver (net/irda/actisys.c)
|
|
|
|
* Drop me a mail for any kind of comment: maxx@spaceboyz.net
|
|
|
|
*/
|
|
|
|
|
|
|
|
void init_act220(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* DLAB 1 */
|
|
|
|
soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* 9600 baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 12);
|
|
|
|
|
|
|
|
/* DLAB 0 */
|
|
|
|
soutp(UART_LCR, UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* reset the dongle, set DTR low for 10us */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
|
|
|
|
udelay(10);
|
|
|
|
|
|
|
|
/* back to normal (still 9600) */
|
|
|
|
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* send RTS pulses until we reach 115200
|
|
|
|
* i hope this is really the same for act220l/act220l+
|
|
|
|
*/
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
|
udelay(10);
|
|
|
|
/* set RTS low for 10 us */
|
|
|
|
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
udelay(10);
|
|
|
|
/* set RTS high for 10 us */
|
|
|
|
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* back to normal operation */
|
|
|
|
udelay(1500); /* better safe than sorry ;) */
|
|
|
|
|
|
|
|
/* Set DLAB 1. */
|
|
|
|
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* Set divisor to 1 => 115200 Baud */
|
|
|
|
soutp(UART_DLM, 0);
|
|
|
|
soutp(UART_DLL, 1);
|
|
|
|
|
|
|
|
/* Set DLAB 0, 7 Bit */
|
|
|
|
/* The dongle doesn't seem to have any problems with operation at 7N1 */
|
|
|
|
soutp(UART_LCR, UART_LCR_WLEN7);
|
|
|
|
|
|
|
|
/* enable interrupts */
|
|
|
|
soutp(UART_IER, UART_IER_RDI);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static int init_sir_ir(void)
|
2010-07-26 23:32:03 +00:00
|
|
|
{
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
retval = init_port();
|
|
|
|
if (retval < 0)
|
|
|
|
return retval;
|
|
|
|
init_hardware();
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_info("Installed.\n");
|
2010-07-26 23:32:03 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static int sir_ir_probe(struct platform_device *dev)
|
2012-06-04 16:05:24 +00:00
|
|
|
{
|
2017-03-25 10:31:57 +00:00
|
|
|
int retval;
|
|
|
|
|
|
|
|
retval = init_chrdev();
|
|
|
|
if (retval < 0)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
return init_sir_ir();
|
2012-06-04 16:05:24 +00:00
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static int sir_ir_remove(struct platform_device *dev)
|
2012-06-04 16:05:24 +00:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static struct platform_driver sir_ir_driver = {
|
|
|
|
.probe = sir_ir_probe,
|
|
|
|
.remove = sir_ir_remove,
|
2012-06-04 16:05:24 +00:00
|
|
|
.driver = {
|
2016-12-19 22:07:08 +00:00
|
|
|
.name = "sir_ir",
|
2012-06-04 16:05:24 +00:00
|
|
|
},
|
|
|
|
};
|
2010-07-26 23:32:03 +00:00
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static int __init sir_ir_init(void)
|
2010-07-26 23:32:03 +00:00
|
|
|
{
|
|
|
|
int retval;
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
retval = platform_driver_register(&sir_ir_driver);
|
2012-06-04 16:05:24 +00:00
|
|
|
if (retval) {
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_err("Platform driver register failed!\n");
|
2012-06-04 16:05:24 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
sir_ir_dev = platform_device_alloc("sir_ir", 0);
|
|
|
|
if (!sir_ir_dev) {
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_err("Platform device alloc failed!\n");
|
2012-06-04 16:05:24 +00:00
|
|
|
retval = -ENOMEM;
|
|
|
|
goto pdev_alloc_fail;
|
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
retval = platform_device_add(sir_ir_dev);
|
2012-06-04 16:05:24 +00:00
|
|
|
if (retval) {
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_err("Platform device add failed!\n");
|
2012-06-04 16:05:24 +00:00
|
|
|
retval = -ENODEV;
|
|
|
|
goto pdev_add_fail;
|
|
|
|
}
|
|
|
|
|
2010-07-26 23:32:03 +00:00
|
|
|
return 0;
|
2012-06-04 16:05:24 +00:00
|
|
|
|
|
|
|
pdev_add_fail:
|
2016-12-19 22:07:08 +00:00
|
|
|
platform_device_put(sir_ir_dev);
|
2012-06-04 16:05:24 +00:00
|
|
|
pdev_alloc_fail:
|
2016-12-19 22:07:08 +00:00
|
|
|
platform_driver_unregister(&sir_ir_driver);
|
2012-06-04 16:05:24 +00:00
|
|
|
return retval;
|
2010-07-26 23:32:03 +00:00
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
static void __exit sir_ir_exit(void)
|
2010-07-26 23:32:03 +00:00
|
|
|
{
|
|
|
|
drop_hardware();
|
|
|
|
drop_port();
|
2016-12-19 22:07:08 +00:00
|
|
|
platform_device_unregister(sir_ir_dev);
|
|
|
|
platform_driver_unregister(&sir_ir_driver);
|
2012-11-08 18:53:37 +00:00
|
|
|
pr_info("Uninstalled.\n");
|
2010-07-26 23:32:03 +00:00
|
|
|
}
|
|
|
|
|
2016-12-19 22:07:08 +00:00
|
|
|
module_init(sir_ir_init);
|
|
|
|
module_exit(sir_ir_exit);
|
2010-07-26 23:32:03 +00:00
|
|
|
|
|
|
|
#ifdef LIRC_SIR_TEKRAM
|
|
|
|
MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
|
|
|
|
MODULE_AUTHOR("Christoph Bartelmus");
|
|
|
|
#elif defined(LIRC_SIR_ACTISYS_ACT200L)
|
|
|
|
MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
|
|
|
|
MODULE_AUTHOR("Karl Bongers");
|
|
|
|
#elif defined(LIRC_SIR_ACTISYS_ACT220L)
|
|
|
|
MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
|
|
|
|
MODULE_AUTHOR("Jan Roemisch");
|
|
|
|
#else
|
|
|
|
MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
|
|
|
|
MODULE_AUTHOR("Milan Pikula");
|
|
|
|
#endif
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
2017-02-11 00:42:38 +00:00
|
|
|
module_param(io, int, 0444);
|
2010-07-26 23:32:03 +00:00
|
|
|
MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
|
|
|
|
|
2017-02-11 00:42:38 +00:00
|
|
|
module_param(irq, int, 0444);
|
2010-07-26 23:32:03 +00:00
|
|
|
MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
|
|
|
|
|
2017-02-11 00:42:38 +00:00
|
|
|
module_param(threshold, int, 0444);
|
2010-07-26 23:32:03 +00:00
|
|
|
MODULE_PARM_DESC(threshold, "space detection threshold (3)");
|
|
|
|
|
2017-02-11 00:42:38 +00:00
|
|
|
module_param(debug, bool, 0644);
|
2010-07-26 23:32:03 +00:00
|
|
|
MODULE_PARM_DESC(debug, "Enable debugging messages");
|