[IA64] enable trap code on slot 1

Because slot 1 of one instr bundle crosses border of two consecutive
8-bytes, kprobe on slot 1 is disabled. This patch enables kprobe on
slot1, it only replaces higher 8-bytes of the instruction bundle and
changes the exception code to ignore the low 12 bits of the break
number (which is across the border in the lower 8-bytes of the bundle).

For those instructions which must execute regardless qp bits,
kprobe on slot 1 is still disabled.

Signed-off-by: bibo,mao <bibo.mao@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Tony Luck 2006-11-14 09:33:38 -08:00
parent 75f6a1de41
commit 08ed38b680
4 changed files with 42 additions and 17 deletions

View File

@ -45,13 +45,14 @@
* to the correct location.
*/
#include <asm/asmmacro.h>
#include <asm-ia64/break.h>
/*
* void jprobe_break(void)
*/
.section .kprobes.text, "ax"
ENTRY(jprobe_break)
break.m 0x80300
break.m __IA64_BREAK_JPROBE
END(jprobe_break)
/*

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@ -88,6 +88,7 @@ static void __kprobes update_kprobe_inst_flag(uint template, uint slot,
{
p->ainsn.inst_flag = 0;
p->ainsn.target_br_reg = 0;
p->ainsn.slot = slot;
/* Check for Break instruction
* Bits 37:40 Major opcode to be zero
@ -296,12 +297,6 @@ static int __kprobes valid_kprobe_addr(int template, int slot,
return -EINVAL;
}
if (slot == 1 && bundle_encoding[template][1] != L) {
printk(KERN_WARNING "Inserting kprobes on slot #1 "
"is not supported\n");
return -EINVAL;
}
return 0;
}
@ -458,23 +453,49 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
void __kprobes arch_arm_kprobe(struct kprobe *p)
{
unsigned long addr = (unsigned long)p->addr;
unsigned long arm_addr = addr & ~0xFULL;
unsigned long arm_addr;
bundle_t *src, *dest;
arm_addr = ((unsigned long)p->addr) & ~0xFUL;
dest = &((kprobe_opcode_t *)arm_addr)->bundle;
src = &p->opcode.bundle;
flush_icache_range((unsigned long)p->ainsn.insn,
(unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t));
memcpy((char *)arm_addr, &p->opcode, sizeof(kprobe_opcode_t));
switch (p->ainsn.slot) {
case 0:
dest->quad0.slot0 = src->quad0.slot0;
break;
case 1:
dest->quad1.slot1_p1 = src->quad1.slot1_p1;
break;
case 2:
dest->quad1.slot2 = src->quad1.slot2;
break;
}
flush_icache_range(arm_addr, arm_addr + sizeof(kprobe_opcode_t));
}
void __kprobes arch_disarm_kprobe(struct kprobe *p)
{
unsigned long addr = (unsigned long)p->addr;
unsigned long arm_addr = addr & ~0xFULL;
unsigned long arm_addr;
bundle_t *src, *dest;
arm_addr = ((unsigned long)p->addr) & ~0xFUL;
dest = &((kprobe_opcode_t *)arm_addr)->bundle;
/* p->ainsn.insn contains the original unaltered kprobe_opcode_t */
memcpy((char *) arm_addr, (char *) p->ainsn.insn,
sizeof(kprobe_opcode_t));
src = &p->ainsn.insn->bundle;
switch (p->ainsn.slot) {
case 0:
dest->quad0.slot0 = src->quad0.slot0;
break;
case 1:
dest->quad1.slot1_p1 = src->quad1.slot1_p1;
break;
case 2:
dest->quad1.slot2 = src->quad1.slot2;
break;
}
flush_icache_range(arm_addr, arm_addr + sizeof(kprobe_opcode_t));
}
@ -807,7 +828,9 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
switch(val) {
case DIE_BREAK:
/* err is break number from ia64_bad_break() */
if (args->err == 0x80200 || args->err == 0x80300 || args->err == 0)
if ((args->err >> 12) == (__IA64_BREAK_KPROBE >> 12)
|| args->err == __IA64_BREAK_JPROBE
|| args->err == 0)
if (pre_kprobes_handler(args))
ret = NOTIFY_STOP;
break;

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@ -12,8 +12,8 @@
* OS-specific debug break numbers:
*/
#define __IA64_BREAK_KDB 0x80100
#define __IA64_BREAK_KPROBE 0x80200
#define __IA64_BREAK_JPROBE 0x80300
#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */
#define __IA64_BREAK_JPROBE 0x82000
/*
* OS-specific break numbers:

View File

@ -115,6 +115,7 @@ struct arch_specific_insn {
#define INST_FLAG_BREAK_INST 4
unsigned long inst_flag;
unsigned short target_br_reg;
unsigned short slot;
};
extern int kprobe_exceptions_notify(struct notifier_block *self,