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sata_mv: workaround errata SATA#13
Add remainder of workaround for errata SATA#13. This prevents writes of certain adjacent 32-bit registers from being combined into single 64-bit writes, which might fail for the affected registers. Most of sata_mv is already safe from this issue, but adding this code to mv_write_cached_reg() will catch the remaining cases and hopefully prevent future ones. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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1 changed files with 19 additions and 1 deletions
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@ -919,8 +919,26 @@ static void mv_save_cached_regs(struct ata_port *ap)
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static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
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{
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if (new != *old) {
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unsigned long laddr;
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*old = new;
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writel(new, addr);
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/*
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* Workaround for 88SX60x1-B2 FEr SATA#13:
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* Read-after-write is needed to prevent generating 64-bit
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* write cycles on the PCI bus for SATA interface registers
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* at offsets ending in 0x4 or 0xc.
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*
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* Looks like a lot of fuss, but it avoids an unnecessary
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* +1 usec read-after-write delay for unaffected registers.
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*/
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laddr = (long)addr & 0xffff;
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if (laddr >= 0x300 && laddr <= 0x33c) {
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laddr &= 0x000f;
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if (laddr == 0x4 || laddr == 0xc) {
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writelfl(new, addr); /* read after write */
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return;
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}
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}
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writel(new, addr); /* unaffected by the errata */
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}
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}
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