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gpio: mcp23s08: Add support for level triggered interrupts
The interrupt for the corresponding pin is configured to trigger when the pin state changes compared to a preconfigured state (Bit set in INTCON). This state is set by setting/clearing the bit in DEFVAL. In the interrupt handler we need also to check if the bit in INTCON is set for level triggered interrupts. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1418f9e6e0
commit
16fe1ad289
1 changed files with 8 additions and 1 deletions
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@ -362,7 +362,8 @@ static irqreturn_t mcp23s08_irq(int irq, void *data)
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for (i = 0; i < mcp->chip.ngpio; i++) {
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for (i = 0; i < mcp->chip.ngpio; i++) {
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if ((BIT(i) & mcp->cache[MCP_INTF]) &&
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if ((BIT(i) & mcp->cache[MCP_INTF]) &&
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((BIT(i) & intcap & mcp->irq_rise) ||
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((BIT(i) & intcap & mcp->irq_rise) ||
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(mcp->irq_fall & ~intcap & BIT(i)))) {
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(mcp->irq_fall & ~intcap & BIT(i)) ||
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(BIT(i) & mcp->cache[MCP_INTCON]))) {
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child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
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child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
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handle_nested_irq(child_irq);
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handle_nested_irq(child_irq);
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}
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}
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@ -408,6 +409,12 @@ static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
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mcp->cache[MCP_INTCON] &= ~BIT(pos);
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mcp->cache[MCP_INTCON] &= ~BIT(pos);
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mcp->irq_rise &= ~BIT(pos);
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mcp->irq_rise &= ~BIT(pos);
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mcp->irq_fall |= BIT(pos);
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mcp->irq_fall |= BIT(pos);
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} else if (type & IRQ_TYPE_LEVEL_HIGH) {
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mcp->cache[MCP_INTCON] |= BIT(pos);
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mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
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} else if (type & IRQ_TYPE_LEVEL_LOW) {
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mcp->cache[MCP_INTCON] |= BIT(pos);
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mcp->cache[MCP_DEFVAL] |= BIT(pos);
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} else
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} else
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return -EINVAL;
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return -EINVAL;
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