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MIPS: Lantiq: Fix pp32 clock on vr9
The vendor code uses different clock values for this clock. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11384/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 8 additions and 3 deletions
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@ -31,10 +31,12 @@
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#define CLOCK_240M 240000000
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#define CLOCK_250M 250000000
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#define CLOCK_266M 266666666
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#define CLOCK_288M 288888888
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#define CLOCK_300M 300000000
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#define CLOCK_333M 333333333
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#define CLOCK_393M 393215332
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#define CLOCK_400M 400000000
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#define CLOCK_432M 432000000
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#define CLOCK_450M 450000000
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#define CLOCK_500M 500000000
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#define CLOCK_600M 600000000
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@ -175,15 +175,18 @@ unsigned long ltq_vr9_fpi_hz(void)
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unsigned long ltq_vr9_pp32_hz(void)
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{
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unsigned int clksys = (ltq_cgu_r32(CGU_SYS) >> 16) & 3;
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unsigned int clksys = (ltq_cgu_r32(CGU_SYS) >> 16) & 0x7;
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unsigned long clk;
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switch (clksys) {
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case 0:
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clk = CLOCK_500M;
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break;
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case 1:
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clk = CLOCK_450M;
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clk = CLOCK_432M;
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break;
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case 2:
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clk = CLOCK_300M;
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clk = CLOCK_288M;
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break;
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default:
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clk = CLOCK_500M;
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