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drm/i915/display: Ensure that ret is always initialized in icl_combo_phy_verify_state
Clang warns:
drivers/gpu/drm/i915/display/intel_combo_phy.c:268:3: warning: variable
'ret' is uninitialized when used here [-Wuninitialized]
ret &= check_phy_reg(dev_priv, phy, ICL_PORT_TX_DW8_LN0(phy),
^~~
drivers/gpu/drm/i915/display/intel_combo_phy.c:261:10: note: initialize
the variable 'ret' to silence this warning
bool ret;
^
= 0
1 warning generated.
In practice, the bug this warning appears to be concerned with would not
actually matter because ret gets initialized to the return value of
cnl_verify_procmon_ref_values. However, that does appear to be a bug
since it means the first hunk of the patch this fixes won't actually do
anything (since the values of check_phy_reg won't factor into the final
ret value). Initialize ret to true then make all of the assignments a
bitwise AND with itself so that the function always does what it should
do.
Fixes: 239bef676d
("drm/i915/display: Implement new combo phy initialization step")
Link: https://github.com/ClangBuiltLinux/linux/issues/1094
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200828202830.7165-1-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
This commit is contained in:
parent
3baea2697b
commit
2034c2129b
1 changed files with 2 additions and 2 deletions
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@ -258,7 +258,7 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy)
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static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
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enum phy phy)
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{
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bool ret;
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bool ret = true;
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u32 expected_val = 0;
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if (!icl_combo_phy_enabled(dev_priv, phy))
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@ -276,7 +276,7 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
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DCC_MODE_SELECT_CONTINUOSLY);
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}
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ret = cnl_verify_procmon_ref_values(dev_priv, phy);
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ret &= cnl_verify_procmon_ref_values(dev_priv, phy);
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if (phy_is_master(dev_priv, phy)) {
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ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),
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