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ARM: S5P64X0: Modified files for SPI consolidation work
As SPI platform devices are consolidated to plat-samsung, some corresponding changes are required in the respective machine folder. Added SPI Setup file for GPIO configurations and platform data initialization. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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323d771745
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4 changed files with 63 additions and 2 deletions
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@ -36,6 +36,11 @@ config S5P64X0_SETUP_I2C1
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help
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Common setup code for i2c bus 1.
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config S5P64X0_SETUP_SPI
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bool
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help
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Common setup code for SPI GPIO configurations
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# machine support
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config MACH_SMDK6440
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@ -45,7 +50,6 @@ config MACH_SMDK6440
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select S3C_DEV_I2C1
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S3C64XX_DEV_SPI
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select SAMSUNG_DEV_ADC
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select SAMSUNG_DEV_BACKLIGHT
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select SAMSUNG_DEV_PWM
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@ -62,7 +66,6 @@ config MACH_SMDK6450
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select S3C_DEV_I2C1
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S3C64XX_DEV_SPI
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select SAMSUNG_DEV_ADC
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select SAMSUNG_DEV_BACKLIGHT
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select SAMSUNG_DEV_PWM
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@ -29,3 +29,4 @@ obj-y += dev-audio.o
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obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
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obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
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obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
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@ -67,6 +67,8 @@
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#define S3C_PA_RTC S5P64X0_PA_RTC
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#define S3C_PA_WDT S5P64X0_PA_WDT
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#define S3C_PA_FB S5P64X0_PA_FB
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#define S3C_PA_SPI0 S5P64X0_PA_SPI0
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#define S3C_PA_SPI1 S5P64X0_PA_SPI1
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#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
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#define S5P_PA_SROMC S5P64X0_PA_SROMC
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55
arch/arm/mach-s5p64x0/setup-spi.c
Normal file
55
arch/arm/mach-s5p64x0/setup-spi.c
Normal file
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@ -0,0 +1,55 @@
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/* linux/arch/arm/mach-s5p64x0/setup-spi.c
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*
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* Copyright (C) 2011 Samsung Electronics Ltd.
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* http://www.samsung.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <plat/gpio-cfg.h>
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#include <plat/cpu.h>
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#include <plat/s3c64xx-spi.h>
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#ifdef CONFIG_S3C64XX_DEV_SPI0
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struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
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.fifo_lvl_mask = 0x1ff,
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.rx_lvl_offset = 15,
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.tx_st_done = 25,
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};
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int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
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{
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if (soc_is_s5p6450())
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s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
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else
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s3c_gpio_cfgall_range(S5P6440_GPC(0), 3,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
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return 0;
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}
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#endif
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#ifdef CONFIG_S3C64XX_DEV_SPI1
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struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
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.fifo_lvl_mask = 0x7f,
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.rx_lvl_offset = 15,
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.tx_st_done = 25,
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};
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int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
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{
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if (soc_is_s5p6450())
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s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
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else
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s3c_gpio_cfgall_range(S5P6440_GPC(4), 3,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
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return 0;
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}
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#endif
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